/**********************************************************************************************************************/
/***** Conditional Compilation ****************************************************************************************/
/**********************************************************************************************************************/


/**********************************************************************************************************************/
/***** Includes *******************************************************************************************************/
/**********************************************************************************************************************/

#include "..\Inc\Includes.H"


#if defined(_DRA_USE_EXTERNAL_MRAM_)

/**********************************************************************************************************************/
/***** Macros and Defines *********************************************************************************************/
/**********************************************************************************************************************/

/**********************************************************************************************************************/
/***** Extern Variables Declarations **********************************************************************************/
/**********************************************************************************************************************/

/**********************************************************************************************************************/
/***** Variables Declarations *****************************************************************************************/
/**********************************************************************************************************************/


/**********************************************************************************************************************/
/***** Extern Functions Declarations **********************************************************************************/
/**********************************************************************************************************************/

#if defined(_DRA_USE_EXTERNAL_MRAM_)

extern void __main();

#endif // of defined(_DRA_USE_EXTERNAL_MRAM_)


/**********************************************************************************************************************/
/***** Function Definitions *******************************************************************************************/
/**********************************************************************************************************************/

/*====================================================================================================================*/
//********* FMC SRAM GPIO Initalize and Configuration
/*====================================================================================================================*/
void rvFMC_SRAM_GPIO_InitAndConfig(void)
{
// DO NOT use any variable
//  if (bFMC_Initialized) {
//    return;
//  }
//  bFMC_Initialized = true;

  /* Peripheral clock enable */
#if defined(RCC_D1CCIPR_FMCSEL)
  MODIFY_REG(RCC->D1CCIPR, RCC_D1CCIPR_FMCSEL, LL_RCC_FMC_CLKSOURCE_PLL2R);
#else
  MODIFY_REG(RCC->CDCCIPR, RCC_CDCCIPR_FMCSEL, LL_RCC_FMC_CLKSOURCE_PLL2R);
#endif /* RCC_D1CCIPR_FMCSEL */

	SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOCEN);
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOCEN);
	} while(false);

	SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIODEN);
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIODEN);
	} while(false);

	SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOEEN);
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOEEN);
	} while(false);

	SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN);
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOFEN);
	} while(false);

	SET_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOGEN);
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB4ENR, RCC_AHB4ENR_GPIOGEN);
	} while(false);

	/* Enable FMC SRAM clock */
	SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
	
	// Do not use any variable else, the code will crash.
	// this code is to be called before __main.
	// The do-while is used toadd some delay
	do
	{
		READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
	} while(false);


  /** FMC GPIO Configuration
  PE3   ------> FMC_A19
  PE4   ------> FMC_A20
  PF0   ------> FMC_A0
  PF1   ------> FMC_A1
  PF2   ------> FMC_A2
  PF3   ------> FMC_A3
  PF4   ------> FMC_A4
  PF5   ------> FMC_A5
  PF12   ------> FMC_A6
  PF13   ------> FMC_A7
  PF14   ------> FMC_A8
  PF15   ------> FMC_A9
  PG0   ------> FMC_A10
  PG1   ------> FMC_A11
  PE7   ------> FMC_D4
  PE8   ------> FMC_D5
  PE9   ------> FMC_D6
  PE10   ------> FMC_D7
  PE11   ------> FMC_D8
  PE12   ------> FMC_D9
  PE13   ------> FMC_D10
  PE14   ------> FMC_D11
  PE15   ------> FMC_D12
  PD8   ------> FMC_D13
  PD9   ------> FMC_D14
  PD10   ------> FMC_D15
  PD11   ------> FMC_A16
  PD12   ------> FMC_A17
  PD13   ------> FMC_A18
  PD14   ------> FMC_D0
  PD15   ------> FMC_D1
  PG2   ------> FMC_A12
  PG3   ------> FMC_A13
  PG4   ------> FMC_A14
  PG5   ------> FMC_A15
  PC7   ------> FMC_NE1
  PD0   ------> FMC_D2
  PD1   ------> FMC_D3
  PD4   ------> FMC_NOE
  PD5   ------> FMC_NWE
  PE0   ------> FMC_NBL0
  PE1   ------> FMC_NBL1
  */

	GPIOE->OSPEEDR |= ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 0UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 1UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 3UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 4UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 7UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 8UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 9UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 10UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 11UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 12UL ) )
                  |	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 13UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 14UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 15UL ) );

	GPIOE->OTYPER &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 7UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOE->PUPDR &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									| ( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 7UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	( * ( (unsigned long long *)GPIOE->AFR ) ) &=
								~ (	( 0xFULL << ( 4 * 0UL ) )
									|	( 0xFULL << ( 4 * 1UL ) )
									| ( 0xFULL << ( 4 * 3UL ) )
									|	( 0xFULL << ( 4 * 4UL ) )
									|	( 0xFULL << ( 4 * 7UL ) )
									| ( 0xFULL << ( 4 * 8UL ) ) 
									|	( 0xFULL << ( 4 * 9UL ) )
									|	( 0xFULL << ( 4 * 10UL ) )
									| ( 0xFULL << ( 4 * 11UL ) )
									|	( 0xFULL << ( 4 * 12UL ) )
                  |	( 0xFULL << ( 4 * 13UL ) )
									|	( 0xFULL << ( 4 * 14UL ) )
									|	( 0xFULL << ( 4 * 15UL ) ) );
									
	( * ( (unsigned long long *)GPIOE->AFR ) ) |=
									(	( 0xCULL << ( 4 * 0UL ) )
									|	( 0xCULL << ( 4 * 1UL ) )
									| ( 0xCULL << ( 4 * 3UL ) )
									|	( 0xCULL << ( 4 * 4UL ) )
									|	( 0xCULL << ( 4 * 7UL ) )
									| ( 0xCULL << ( 4 * 8UL ) ) 
									|	( 0xCULL << ( 4 * 9UL ) )
									|	( 0xCULL << ( 4 * 10UL ) )
									| ( 0xCULL << ( 4 * 11UL ) )
									|	( 0xCULL << ( 4 * 12UL ) )
                  |	( 0xCULL << ( 4 * 13UL ) )
									|	( 0xCULL << ( 4 * 14UL ) )
									|	( 0xCULL << ( 4 * 15UL ) ) );

	GPIOE->MODER &=	
								~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									| ( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 7UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOE->MODER |=		( GPIO_MODE_AF_PP << ( 2 * 0UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 1UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 3UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 4UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 7UL ) )
									| ( GPIO_MODE_AF_PP << ( 2 * 8UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 9UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 10UL ) )
									| ( GPIO_MODE_AF_PP << ( 2 * 11UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 12UL ) )
                  |	( GPIO_MODE_AF_PP << ( 2 * 13UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 14UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 15UL ) );


	GPIOF->OSPEEDR |= ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 0UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 1UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 2UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 3UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 4UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 5UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 12UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 13UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 14UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 15UL ) );
									
	GPIOF->OTYPER &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 2UL ) )
									|	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									| ( 3UL << ( 2 * 5UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOF->PUPDR &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									| ( 3UL << ( 2 * 2UL ) )
									|	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									| ( 3UL << ( 2 * 5UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	( * ( (unsigned long long *)GPIOF->AFR ) ) &=
								~ (	( 0xFULL << ( 4 * 0UL ) )
									|	( 0xFULL << ( 4 * 1UL ) )
									| ( 0xFULL << ( 4 * 2UL ) )
									|	( 0xFULL << ( 4 * 3UL ) )
									|	( 0xFULL << ( 4 * 4UL ) )
									| ( 0xFULL << ( 4 * 5UL ) ) 
									|	( 0xFULL << ( 4 * 12UL ) )
                  |	( 0xFULL << ( 4 * 13UL ) )
									|	( 0xFULL << ( 4 * 14UL ) )
									|	( 0xFULL << ( 4 * 15UL ) ) );
									
	( * ( (unsigned long long *)GPIOF->AFR ) ) |=
									(	( 0xCULL << ( 4 * 0UL ) )
									|	( 0xCULL << ( 4 * 1UL ) )
									| ( 0xCULL << ( 4 * 2UL ) )
									|	( 0xCULL << ( 4 * 3UL ) )
									|	( 0xCULL << ( 4 * 4UL ) )
									| ( 0xCULL << ( 4 * 5UL ) ) 
									|	( 0xCULL << ( 4 * 12UL ) )
                  |	( 0xCULL << ( 4 * 13UL ) )
									|	( 0xCULL << ( 4 * 14UL ) )
									|	( 0xCULL << ( 4 * 15UL ) ) );

	GPIOF->MODER &=	
								~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									| ( 3UL << ( 2 * 2UL ) )
									|	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									| ( 3UL << ( 2 * 5UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOF->MODER |=		( GPIO_MODE_AF_PP << ( 2 * 0UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 1UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 2UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 3UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 4UL ) )
									| ( GPIO_MODE_AF_PP << ( 2 * 5UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 12UL ) )
                  |	( GPIO_MODE_AF_PP << ( 2 * 13UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 14UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 15UL ) );


	GPIOG->OSPEEDR |= ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 0UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 1UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 2UL ) )
                  |	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 3UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 4UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 5UL ) );

	GPIOG->OTYPER &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 2UL ) )
                  |	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) ) );

	GPIOG->PUPDR &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 2UL ) )
                  |	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) ) );

	( * ( (unsigned long long *)GPIOG->AFR ) ) &=
								~ (	( 0xFULL << ( 4 * 0UL ) )
									|	( 0xFULL << ( 4 * 1UL ) )
									|	( 0xFULL << ( 4 * 2UL ) )
                  |	( 0xFULL << ( 4 * 3UL ) )
									|	( 0xFULL << ( 4 * 4UL ) )
									|	( 0xFULL << ( 4 * 5UL ) ) );
									
	( * ( (unsigned long long *)GPIOG->AFR ) ) |=
									(	( 0xCULL << ( 4 * 0UL ) )
									|	( 0xCULL << ( 4 * 1UL ) )
									|	( 0xCULL << ( 4 * 2UL ) )
                  |	( 0xCULL << ( 4 * 3UL ) )
									|	( 0xCULL << ( 4 * 4UL ) )
									|	( 0xCULL << ( 4 * 5UL ) ) );

	GPIOG->MODER &=	
								~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 2UL ) )
                  |	( 3UL << ( 2 * 3UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) ) );

	GPIOG->MODER |=		( GPIO_MODE_AF_PP << ( 2 * 0UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 1UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 2UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 3UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 4UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 5UL ) );


	GPIOD->OSPEEDR |= ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 0UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 1UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 4UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 5UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 8UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 9UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 10UL ) )
									| ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 11UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 12UL ) )
                  |	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 13UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 14UL ) )
									|	( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 15UL ) );

	GPIOD->OTYPER &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOD->PUPDR &=	~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	( * ( (unsigned long long *)GPIOD->AFR ) ) &=
								~ (	( 0xFULL << ( 4 * 0UL ) )
									|	( 0xFULL << ( 4 * 1UL ) )
									|	( 0xFULL << ( 4 * 4UL ) )
									|	( 0xFULL << ( 4 * 5UL ) )
									| ( 0xFULL << ( 4 * 8UL ) ) 
									|	( 0xFULL << ( 4 * 9UL ) )
									|	( 0xFULL << ( 4 * 10UL ) )
									| ( 0xFULL << ( 4 * 11UL ) )
									|	( 0xFULL << ( 4 * 12UL ) )
                  |	( 0xFULL << ( 4 * 13UL ) )
									|	( 0xFULL << ( 4 * 14UL ) )
									|	( 0xFULL << ( 4 * 15UL ) ) );
									
	( * ( (unsigned long long *)GPIOD->AFR ) ) |=
									(	( 0xCULL << ( 4 * 0UL ) )
									|	( 0xCULL << ( 4 * 1UL ) )
									|	( 0xCULL << ( 4 * 4UL ) )
									|	( 0xCULL << ( 4 * 5UL ) )
									| ( 0xCULL << ( 4 * 8UL ) ) 
									|	( 0xCULL << ( 4 * 9UL ) )
									|	( 0xCULL << ( 4 * 10UL ) )
									| ( 0xCULL << ( 4 * 11UL ) )
									|	( 0xCULL << ( 4 * 12UL ) )
                  |	( 0xCULL << ( 4 * 13UL ) )
									|	( 0xCULL << ( 4 * 14UL ) )
									|	( 0xCULL << ( 4 * 15UL ) ) );

	GPIOD->MODER &=	
								~ (	( 3UL << ( 2 * 0UL ) )
									|	( 3UL << ( 2 * 1UL ) )
									|	( 3UL << ( 2 * 4UL ) )
									|	( 3UL << ( 2 * 5UL ) )
									| ( 3UL << ( 2 * 8UL ) )
									|	( 3UL << ( 2 * 9UL ) )
									|	( 3UL << ( 2 * 10UL ) )
									| ( 3UL << ( 2 * 11UL ) )
									|	( 3UL << ( 2 * 12UL ) )
                  |	( 3UL << ( 2 * 13UL ) )
									|	( 3UL << ( 2 * 14UL ) )
									|	( 3UL << ( 2 * 15UL ) ) );

	GPIOD->MODER |=		( GPIO_MODE_AF_PP << ( 2 * 0UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 1UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 4UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 5UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 8UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 9UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 10UL ) )
									| ( GPIO_MODE_AF_PP << ( 2 * 11UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 12UL ) )
                  |	( GPIO_MODE_AF_PP << ( 2 * 13UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 14UL ) )
									|	( GPIO_MODE_AF_PP << ( 2 * 15UL ) );


	GPIOC->OSPEEDR |= ( GPIO_SPEED_FREQ_VERY_HIGH << ( 2 * 7UL ) );

	GPIOC->OTYPER &=	~ (	( 3UL << ( 2 * 7UL ) ) );

	GPIOC->PUPDR &=	~ (	( 3UL << ( 2 * 7UL ) ) );

	( * ( (unsigned long long *)GPIOC->AFR ) ) &=
								~ (	( 0xFULL << ( 4 * 7UL ) ) );
									
	( * ( (unsigned long long *)GPIOC->AFR ) ) |=
									(	( 0x9ULL << ( 4 * 7UL ) ) );

	GPIOC->MODER &=	
								~ (	( 3UL << ( 2 * 7UL ) ) );

	GPIOC->MODER |=		( GPIO_MODE_AF_PP << ( 2 * 7UL ) );
}
//********* FMC SRAM GPIO Initalize and Configuration

void rvSystemClockConfig(void)
{
  MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, LL_FLASH_LATENCY_4);
  while(LL_FLASH_LATENCY_4 != (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)))
  {
  }
  MODIFY_REG(PWR->CR3, (PWR_CR3_SCUEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS), LL_PWR_LDO_SUPPLY);
#if defined (PWR_CPUCR_PDDS_D2)
  MODIFY_REG(PWR->D3CR, PWR_D3CR_VOS, LL_PWR_REGU_VOLTAGE_SCALE0);
#else
  MODIFY_REG(PWR->SRDCR, PWR_SRDCR_VOS, LL_PWR_REGU_VOLTAGE_SCALE0);
#endif /* PWR_CPUCR_PDDS_D2 */

  SET_BIT(RCC->CR, RCC_CR_HSEON);

   /* Wait till HSE is ready */
  while(((READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY))?1UL:0UL) != 1)
  {
  }
  MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC, LL_RCC_PLLSOURCE_HSE);
  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVP1EN);
  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVR1EN);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL1RGE, LL_RCC_PLLINPUTRANGE_2_4 << RCC_PLLCFGR_PLL1RGE_Pos);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL1VCOSEL, LL_RCC_PLLVCORANGE_WIDE << RCC_PLLCFGR_PLL1VCOSEL_Pos);
  MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1, 10UL << RCC_PLLCKSELR_DIVM1_Pos);
  MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_N1, (384UL-1UL) << RCC_PLL1DIVR_N1_Pos);
  MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_P1, (2UL-1UL) << RCC_PLL1DIVR_P1_Pos);
  MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_Q1, (96UL-1UL) << RCC_PLL1DIVR_Q1_Pos);
  MODIFY_REG(RCC->PLL1DIVR, RCC_PLL1DIVR_R1, (96UL-1UL) << RCC_PLL1DIVR_R1_Pos);
  SET_BIT(RCC->CR, RCC_CR_PLL1ON);

   /* Wait till PLL is ready */
  while(((READ_BIT(RCC->CR, RCC_CR_PLL1RDY) == (RCC_CR_PLL1RDY))?1UL:0UL) != 1)
  {
  }

   /* Intermediate AHB prescaler 2 when target frequency clock is higher than 80 MHz */
#if defined(RCC_D1CFGR_HPRE)
  MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, LL_RCC_AHB_DIV_2);
#else
  MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_HPRE, LL_RCC_AHB_DIV_2);
#endif /* RCC_D1CFGR_HPRE */

  MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, LL_RCC_SYS_CLKSOURCE_PLL1);
	
#if defined(RCC_D1CFGR_D1CPRE)
  MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, LL_RCC_SYSCLK_DIV_1);
#else
  MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, LL_RCC_SYSCLK_DIV_1);
#endif /* RCC_D1CFGR_D1CPRE */
	
#if defined(RCC_D1CFGR_HPRE)
  MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, LL_RCC_AHB_DIV_2);
#else
  MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_HPRE, LL_RCC_AHB_DIV_2);
#endif /* RCC_D1CFGR_HPRE */

#if defined(RCC_D2CFGR_D2PPRE1)
  MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, LL_RCC_APB1_DIV_2);
#else
  MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, LL_RCC_APB1_DIV_2);
#endif /* RCC_D2CFGR_D2PPRE1 */

#if defined(RCC_D2CFGR_D2PPRE2)
  MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, LL_RCC_APB2_DIV_2);
#else
  MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE2, LL_RCC_APB2_DIV_2);
#endif /* RCC_D2CFGR_D2PPRE2 */

#if defined(RCC_D1CFGR_D1PPRE)
  MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, LL_RCC_APB3_DIV_2);
#else
  MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDPPRE, LL_RCC_APB3_DIV_2);
#endif /* RCC_D1CFGR_D1PPRE */

#if defined(RCC_D3CFGR_D3PPRE)
  MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, LL_RCC_APB4_DIV_2);
#else
  MODIFY_REG(RCC->SRDCFGR, RCC_SRDCFGR_SRDPPRE, LL_RCC_APB4_DIV_2);
#endif /* RCC_D3CFGR_D3PPRE */

  // This LL_SetSystemCoreClock(); assignment will cause issue, if the encapsulating function
	// is called before __main(). Call the below function in main()
	// LL_SetSystemCoreClock(480000000);

  /* Update the time base */
	// Below assignment will cause issue, if the encapsulating function
	// is called before __main(). Call the below function in main()
  // if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
  // {
  //   Error_Handler();
  // }
	
	MODIFY_REG(RCC->CFGR,  (LL_RCC_MCO1SOURCE_HSE << 16U) | (LL_RCC_MCO1_DIV_1 << 16U), (LL_RCC_MCO1SOURCE_HSE & 0xFFFF0000U) | (LL_RCC_MCO1_DIV_1 & 0xFFFF0000U));
}

/**
  * @brief Peripherals Common Clock Configuration
  * @retval None
  */
void rvPeriphCommonClockConfig(void)
{
  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVP2EN);
  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVQ2EN);
  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVR2EN);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL2RGE, LL_RCC_PLLINPUTRANGE_2_4 << RCC_PLLCFGR_PLL2RGE_Pos);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL2VCOSEL, LL_RCC_PLLVCORANGE_WIDE << RCC_PLLCFGR_PLL2VCOSEL_Pos);
  MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM2, 10UL << RCC_PLLCKSELR_DIVM2_Pos);
  MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_N2, (384UL-1UL) << RCC_PLL2DIVR_N2_Pos);
  MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_P2, (15UL-1UL) << RCC_PLL2DIVR_P2_Pos);
  MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_Q2, (48UL-1UL) << RCC_PLL2DIVR_Q2_Pos);
  MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_R2, (15UL-1UL) << RCC_PLL2DIVR_R2_Pos);
  SET_BIT(RCC->CR, RCC_CR_PLL2ON);

   /* Wait till PLL is ready */
  while(((READ_BIT(RCC->CR, RCC_CR_PLL2RDY) == (RCC_CR_PLL2RDY))?1UL:0UL) != 1)
  {
  }

  SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_DIVQ3EN);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL3RGE, LL_RCC_PLLINPUTRANGE_1_2 << RCC_PLLCFGR_PLL3RGE_Pos);
  MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLL3VCOSEL, LL_RCC_PLLVCORANGE_MEDIUM << RCC_PLLCFGR_PLL3VCOSEL_Pos);
  MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM3, 23UL << RCC_PLLCKSELR_DIVM3_Pos);
  MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_N3, (156UL-1UL) << RCC_PLL3DIVR_N3_Pos);
  MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_P3, (23UL-1UL) << RCC_PLL3DIVR_P3_Pos);
  MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_Q3, (23UL-1UL) << RCC_PLL3DIVR_Q3_Pos);
  MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_R3, (23UL-1UL) << RCC_PLL3DIVR_R3_Pos);
  SET_BIT(RCC->CR, RCC_CR_PLL3ON);

   /* Wait till PLL is ready */
  while(((READ_BIT(RCC->CR, RCC_CR_PLL3RDY) == (RCC_CR_PLL3RDY))?1UL:0UL) != 1)
  {
  }

#if defined(RCC_D1CCIPR_CKPERSEL)
  MODIFY_REG(RCC->D1CCIPR, RCC_D1CCIPR_CKPERSEL, LL_RCC_CLKP_CLKSOURCE_HSE);
#else
  MODIFY_REG(RCC->CDCCIPR, RCC_CDCCIPR_CKPERSEL, LL_RCC_CLKP_CLKSOURCE_HSE);
#endif /* RCC_D1CCIPR_CKPERSEL */
}

void Reset_Handler()
{
	SystemInit();
	/* Configure the system clock */
  rvSystemClockConfig();

/* Configure the peripherals common clocks */
  rvPeriphCommonClockConfig();

	rvFMC_SRAM_GPIO_InitAndConfig();
	__main();
}

#endif // of defined(_DRA_USE_EXTERNAL_MRAM_)