void CapTuning(void)

{
    byte abyCin[3] = {4,7,8};
    byte abyClen[3] = {14, 24,31};
    byte abyCout[3] = {13,16,20};
    byte CapTestVals[3];
    byte CapSetVals[3];
    byte byNewPower = 0; 
    byte byPower = 0;
    
    SPI_Init();
    InitializeInterrogator();
    for (byte i = 0; i<3; i++)
    {
        mIO_SetPin(ETC1_PIN);
        SPI_WriteByteOther(abyCin[i] & 0x1F);
        mIO_ResetPin(ETC1_PIN);
        
        for (byte j = 0; j<3; j++)
        {
            mIO_SetPin(ETC2_PIN);
            SPI_WriteByteOther(abyClen[j] & 0x1F);
            mIO_ResetPin(ETC2_PIN);
        
            for (byte k = 0; k<3; k++)
            {
                mIO_SetPin(ETC3_PIN);
                SPI_WriteByteOther(abyCout[k] & 0x1F);
                mIO_ResetPin(ETC3_PIN);
        
                /* Get refelected power */
                byNewPower = GetReflectedPower();
                if (byNewPower > byPower)
                {
                    CapSetVals[0] = abyCin[i];
                    CapSetVals[1] = abyClen[j];
                    CapSetVals[2] = abyCout[k];
                }
            }
        } 
    }
    mIO_SetPin(ETC1_PIN);
    SPI_WriteByteOther((CapSetVals[0]) & 0x1F);
    mIO_ResetPin(ETC1_PIN); 
    mIO_SetPin(ETC2_PIN);
    SPI_WriteByteOther((CapSetVals[1]) & 0x1F);
    mIO_ResetPin(ETC2_PIN); 
    mIO_SetPin(ETC3_PIN);
    SPI_WriteByteOther((CapSetVals[2]) & 0x1F);
    mIO_ResetPin(ETC3_PIN); 
}

/* ************************************************************************** */
word GetReflectedPower(void)
{
    word valIQ;
    byte valI, valQ;
    byte regMeas, regIRQMask1, regIRQMask2,regValProtoCtrl;

    regIRQMask1 = SPI_ReadByte(INTERRUPT_REG_1|READMASK);
    regIRQMask2 = SPI_ReadByte(INTERRUPT_REG_2|READMASK);
    SingleWriteToST25RU3993(INTERRUPT_REG_1, regIRQMask1 & ~0x01); // disable noresponse irq
    SingleWriteToST25RU3993(INTERRUPT_REG_2, regIRQMask2 & ~0x40); // disable cmd irq

    regValProtoCtrl = SPI_ReadByte(PROTOCOL_SELECTION_REG|READMASK);
    SingleWriteToST25RU3993(PROTOCOL_SELECTION_REG, regValProtoCtrl | 0x40);

    regMeas = SPI_ReadByte(MEASUREMENT_CONTROL_REG|READMASK);

    SPI_WriteByte(BLOCK_RX);    // Reset the receiver - otherwise the I values seem to oscillate
    SPI_WriteByte(ENABLE_RX);

    SingleWriteToST25RU3993(MEASUREMENT_CONTROL_REG, (regMeas & 0xF0) | 0x01); // set msel bits -> Mixer DC level I-channel
    __delay_us(500); // settling time
    valI = st25RU3993GetADC();

    SingleWriteToST25RU3993(MEASUREMENT_CONTROL_REG, (regMeas & 0xF0) | 0x02); // set msel bits -> Mixer DC level Q-channel
    __delay_us(500); // settling time
    valQ = st25RU3993GetADC();

    SPI_WriteByte(BLOCK_RX);    // Disable the receiver since we enabled it before

    // save together
    valIQ = valQ;
    valIQ = (valIQ<<8)&0xFF00;
    valIQ = (valIQ&0xFF00)|(valI&0x00FF);

    // restore previous register values
    SingleWriteToST25RU3993(MEASUREMENT_CONTROL_REG, regMeas);
    SingleWriteToST25RU3993(PROTOCOL_SELECTION_REG, regValProtoCtrl);
    SingleWriteToST25RU3993(INTERRUPT_REG_1, regIRQMask1);
    SingleWriteToST25RU3993(INTERRUPT_REG_2, regIRQMask2);

    return valIQ;
}

/* ************************************************************************** */
static byte st25RU3993GetADC(void)
{
    byte val;
    SPI_WriteByte(TRIGGER_ADC);
    __delay_us(20);   // according to spec
    val = SPI_ReadByte(ADC_REG|READMASK);
    val = CONVERT_ADC_TO_NAT(val);
    return val;
}