/*Case 1: main.c*/

uint8_t C[] = {0x11, 0x33};
if (CSP_QUADSPI_Init() == HAL_OK) 
{

CSP_QSPI_EnableMemoryMappedMode();
       
}


CSPI_QSPI_Write(C,0,sizeof(C));
memcpy(ReadMem_SN,(uint8_t*)0x90000000,sizeof(ReadMem_SN));
 


.........

	/* Start scheduler */
	osKernelStart();
while(1)
{

}






/* Case 2*/


/*File: main.c*/

uint8_t C[] = {0x11, 0x33};
if (CSP_QUADSPI_Init() == HAL_OK) 
{

CSP_QSPI_EnableMemoryMappedMode();
       
}


CSPI_QSPI_Write(C,0,sizeof(C));
memcpy(ReadMem_SN,(uint8_t*)0x90000000,sizeof(ReadMem_SN));
 
RXCANTask_Init();

.........

	/* Start scheduler */
osKernelStart();
while(1)
{

}



/*File: task.c*/





const osThreadAttr_t CANTask2_attributes = {
		.name = "CANTask2",
		.stack_size = 512 * 4,
		.priority = (osPriority_t) osPriorityNormal,
};


void RXCANTask_Init()
{

	CANTask2Handle = osThreadNew(RXCANTask,NULL, &CANTask2_attributes);


}


uint8_t C[] = {0x11 , 0x22};

void RXCANTask(void * argument)
{

  CSPI_QSPI_WriteMem(C,0,sizeof(C));



}



uint8_t
CSP_QSPI_WriteMemory( uint8_t* buffer, uint32_t address, uint32_t buffer_size )
{
	 QSPI_CommandTypeDef s_command;
    uint32_t end_addr, current_size, current_addr;

    current_addr = 0;


	while (current_addr <= address) {
		current_addr += MEMORY_PAGE_SIZE;
	}
	current_size = current_addr - address;

	/* Check if the size of the data is less than the remaining place in the page */
	if (current_size > buffer_size) {
		current_size = buffer_size;
	}

	/* Initialize the adress variables */
	current_addr = address;
	end_addr = address + buffer_size;

    s_command.InstructionMode = QSPI_INSTRUCTION_4_LINES;
    s_command.Instruction     = FOUR_BYTE_QUAD_IN_FAST_PROG_CMD;
    s_command.AddressMode     = QSPI_ADDRESS_4_LINES;
    s_command.DataMode        = QSPI_DATA_4_LINES;
    s_command.AddressSize       = QSPI_ADDRESS_32_BITS;

    s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
    s_command.DummyCycles       = 0;
    s_command.DdrMode           = QSPI_DDR_MODE_DISABLE;
    s_command.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
    s_command.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;


    do
    {

        s_command.Address = current_addr;
        s_command.NbData = current_size;

        if ( current_size == 0 )
        {
            return 1;  // HAL_OK;
        }

        if (HAL_OK != QSPI_WriteEnable( MT25QL512G_QPI_MODE ))
           {
               return 2; // HAL_ERROR;
           }

        //if ( HAL_OK != QSPI_AutoPollingMemReady_Quad( ) )
        {
        //    return HAL_ERROR;
        }



        if ( HAL_OK !=
             HAL_QSPI_Command( &hqspi, &s_command,
                              HAL_QPSI_TIMEOUT_DEFAULT_VALUE ) )
        {
            return 3;  //HAL_ERROR;   //  PP failed
        }

        if ( HAL_OK !=
             HAL_QSPI_Transmit( &hqspi, buffer,
                                HAL_QPSI_TIMEOUT_DEFAULT_VALUE ) )
        {
            return 4;// HAL_ERROR;   //  Data failed
        }

        if ( HAL_OK != QSPI_AutoPollingMemReady_Quad( ) )
        {
            return  5; //HAL_ERROR;   //  Status failed
        }

		current_addr += current_size;
		buffer += current_size;
		current_size =
				((current_addr + MEMORY_PAGE_SIZE) > end_addr) ?
						(end_addr - current_addr) : MEMORY_PAGE_SIZE;

    } while ( current_addr <= end_addr );



    return HAL_OK;
}