/*
******************************************************************************
**

**  File        : LinkerScript.ld
**
**  Author		: Auto-generated by System Workbench for STM32
**
**  Abstract    : Linker script for STM32H7B3RITx series
**                2048Kbytes FLASH and 1216Kbytes RAM
**
**                Set heap size, stack size and stack location according
**                to application requirements.
**
**                Set memory bank area and size if external memory is used.
**
**  Target      : STMicroelectronics STM32
**
**  Distribution: The file is distributed “as is,�? without any warranty
**                of any kind.
**
*****************************************************************************
** @attention
**
** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**   1. Redistributions of source code must retain the above copyright notice,
**      this list of conditions and the following disclaimer.
**   2. Redistributions in binary form must reproduce the above copyright notice,
**      this list of conditions and the following disclaimer in the documentation
**      and/or other materials provided with the distribution.
**   3. Neither the name of STMicroelectronics nor the names of its contributors
**      may be used to endorse or promote products derived from this software
**      without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
*****************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = 0x20020000;    /* end of RAM */
__SP_INIT = _estack;

/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200;      /* required amount of heap  */
_Min_Stack_Size = 0x3000; /* required amount of stack */
__stack_size = _Min_Stack_Size;

PROVIDE (  SE_APP_GetActiveFwInfo           = 0x08006000);
__ICFEDIT_SLOT_Active_1_start__  = 0x08010000;
__ICFEDIT_intvec_start__  = __ICFEDIT_SLOT_Active_1_start__    + 0x400;  /* Cortex-M7: align the init vectors on 0x400 */
__ICFEDIT_SE_IF_region_ROM_start__  = 0x08000000 + 0x6000;
__ICFEDIT_SE_IF_region_ROM_end__    = __ICFEDIT_SE_IF_region_ROM_start__ + 0x8FF;
SE_IF_region_ROM_Length             = __ICFEDIT_SE_IF_region_ROM_end__ - __ICFEDIT_SE_IF_region_ROM_start__ + 1;

PROVIDE( __SP_END   = __SP_INIT - _Min_Stack_Size);

/* The flash sector size is 8k */
FLASH_SECTOR_SIZE = 0x2000 ;
VECTOR_SIZE = 0x400;

/* Find and change the locations 0x80000 based on 
** the primary flash size for the part being used. 
*/
PROVIDE (  __FLASH_ADDRESS  = 0x08010000 );
PROVIDE (  __FLASH_SIZE     = 0x00200000 );
PROVIDE (  __ICFEDIT_SLOT_Active_1_header__ = 0x8010000);

/* Specify the memory areas */
MEMORY
{
    m_command       (RW) 	: ORIGIN = ( 0x24000000           )  , LENGTH = (  0x10                    )
  	m_reboot_ram    (RW) 	: ORIGIN = ( 0x24000000 + 0x10    )  , LENGTH = (  0x10                    )
	RAM 			(xrw)   : ORIGIN = ( 0x24000000 + 0x20    )  , LENGTH = (  1024K - _Min_Stack_Size - 0x20 )
	
	ITCMRAM 		(xrw)	: ORIGIN = ( 0x00000000           )  , LENGTH = (  64K                     )
  	DTCMRAM         (xrw) 	: ORIGIN = ( 0x20000000           )  , LENGTH = (  128K                    )
    
	SE_IF_region_ROM (rx)   : ORIGIN = __ICFEDIT_SE_IF_region_ROM_start__, LENGTH = SE_IF_region_ROM_Length
	
    ISR_VECTOR      (rx)    : ORIGIN = __ICFEDIT_intvec_start__ , LENGTH = VECTOR_SIZE
    /* APPLICATION */

    FLASH           (rx)    : ORIGIN = 0x8010800 , LENGTH = ( 0x1B5B00)
    AppDataSection  (r)     : ORIGIN = 0x81C9F00 , LENGTH = ( 0x00080 )
    CRCSegments     (r)     : ORIGIN = 0x81C9F80 , LENGTH = ( 0x00070 )
    CRCaddr         (r)     : ORIGIN = 0x81C9FF0 , LENGTH = ( 0x00010 )
    StmFileSysFlash (rw)    : ORIGIN = 0x81CA000 , LENGTH = ( 0x06000 ) /*  24KB */
    SafeFatFsFlash  (rw)	: ORIGIN = 0x81D0000 , LENGTH = ( 0x30000 ) /* 192KB */
}

/* RAM SIZE is used to display length of available RAM during micro startup.
   The memory from  __bss_start, a.k.a. _RAM_ADDRESS,  for the length __RAM_SIZE
   As defined below, are tested by the ram check routines.

   DMA RAM or other Perepheral RAM can be mapped to BitBandRAM
   or use the SRAM2 and CCM SRAM for better usage of SRAM
*/
/*PROVIDE( __RAM_SIZE = 0x100000 - _Min_Stack_Size );*/

/* Define output sections */
SECTIONS
{
  /* The startup code goes first into FLASH */
  .isr_vector :
  {
	__vector_table = .;
	. = ALIGN(4);
	KEEP(*(.isr_vector)) /* Startup code */
	FILL(0);
	. = ORIGIN(ISR_VECTOR) + LENGTH(ISR_VECTOR) - 1;
	BYTE(0)
	. = ALIGN(4);
  } >ISR_VECTOR

 .SE_IF_Code : {
	KEEP(*se_interface_app.o (.text .text*))
  } >SE_IF_region_ROM
  
  /* The program code and other data goes into FLASH */
  .text :
  {
  	_start_of_text = .; /* get the starting address in a variable */
    . = ALIGN(4);
    *(.text)           /* .text sections (code) */
    *(.text*)          /* .text* sections (code) */
    *(.glue_7)         /* glue arm to thumb code */
    *(.glue_7t)        /* glue thumb to arm code */
    *(.eh_frame)

    KEEP (*(.init))
    KEEP (*(.fini))

    . = ALIGN(4);
    _etext = .;        /* define a global symbols at end of code */
  } >FLASH

  /* Constant data goes into FLASH */
  .rodata :
  {
    . = ALIGN(4);
    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
    . = ALIGN(4);
  } >FLASH

  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
  .ARM : {
    __exidx_start = .;
    *(.ARM.exidx*)
    __exidx_end = .;
  } >FLASH

  .preinit_array     :
  {
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array*))
    PROVIDE_HIDDEN (__preinit_array_end = .);
  } >FLASH
  .init_array :
  {
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array*))
    PROVIDE_HIDDEN (__init_array_end = .);
  } >FLASH
  .fini_array :
  {
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
    
    ___ROM_AT = .;
    PROVIDE ( __END_OF_ROM_DATA = ___ROM_AT );
  } >FLASH

  /* used by the startup to initialize data */
  _sidata = LOADADDR(.data);

  /* Initialized data sections goes into RAM, load LMA copy after code */
  .data : 
  {
    . = ALIGN(4);
    _sdata = .;        /* create a global symbol at data start */
    *(.data)           /* .data sections */
    *(.data*)          /* .data* sections */

    . = ALIGN(4);
    _edata = .;        /* define a global symbol at data end */
  } >RAM AT> FLASH

  ___data_size = _edata - _sdata;

  /* Application Version Data is image information from the compiler.
  */
  .appVersionData :
  {
     PROVIDE(___APPDATASECTION_START = .);
     KEEP (*( .appVersionData ))

     . = ALIGN (0x4);
     PROVIDE(___APPDATASECTION_END = .);
   }  >AppDataSection
   
  /*
  *  Name: CRCSegments
  *  Use:     Structure with memory segments which should be checked by CRC
  *  Area:     ROM
  *  Operation during loader: Can change
  *  Notes: Any new section which is checked by CRC should be added in here using
  *         the following format:
  *        0   = START_ADDRESS_SECTOR0 (long)
  *        1   = END_ADDRESS_SECTOR0 (long)
  *        ...
  *        n   = START_ADDRESS_SECTORn (long)
  *        n   = END_ADDRESS_SECTORn (long)
  *        0xFFFFFFFF (end of table delimiter)
  */
  .crcsegments :
  {
     __CRCSEGMENTS_START = .;
         . = ALIGN (0x4);
     LONG( __vector_table               );

     /*
     *  __vector_table starting address will vary based on the location of application code memory
     *  if the bootloader existings in the code memory, then bootloader will occupy the first sector
     *  So, we need to consider the vector table start address while defining the end address of vector
     */
     LONG( __vector_table + SIZEOF( .isr_vector ) );

     /* Check value from the beginning of the rom protection data, followed by the application  */
     /* to __END_OF_ROM_DATA, after which are some small data tables.         */
     LONG( _start_of_text               );
     LONG( _romp_at  );

     LONG( ___APPDATASECTION_START      ); /* Include the application data segment. */
     LONG( ___APPDATASECTION_END        );

     LONG( __CRCSEGMENTS_START          ); /* Include the CRC segments area itself. */
     LONG( . + 8                        ); /* which also includes the FF marker. */
     LONG( 0xFFFFFFFF                   ); 

    __CRCSEGMENTS_END = .;
    __CRCSEGMENTS_SIZE = __CRCSEGMENTS_END - __CRCSEGMENTS_START;

  } > CRCSegments

  /*
  *   Name: CRCValues
  *   Use:     Reserved area for CRC value (written by external application)
  *   Area:     ROM
  *   Operation during loader: Can change
  *   Notes: Write 0xFFFFFFFF in order to be able to re-write area
  *   CRC will be placed in here by s19crc app
  */

  .CRCValues :
  {
     KEEP (*( .CRCValues ))
  } > CRCaddr

  /* file system Flash configurations. */
  PROVIDE( __STMDATA_SECTOR_COUNT         = 0x0003    );
  PROVIDE( __STMDATA_SIZE                 = 0x2000    );

  .stmTableData (NOLOAD):
  {
     /* Placing the STM data in the FlexNVM Flash on the Kinetis part 
        places the start address, way up at; 0x1000_0000
        Much of the memory manipulation code originally used sector 
        counts to manipulate addresses but the math starts to get hugh.
        So, instead, __STMDATASECTION_START will be used as the base 
        address and __STMDATA_FIRST_SECTOR & __STMDATA_LAST_SECTOR
        will be depriciated.
     */
     PROVIDE( __STMDATASECTION_START = .);      /* This is an absolute address. s/b 0x1000_0000  */

     *(.stmTableSeg)
     . = ALIGN (0x4);
     /*. += ( __STMDATA_SECTOR_COUNT * __STMDATA_SIZE );*/

     /*PROVIDE( __STMDATASECTION_AFTER = .);*/

  }  > StmFileSysFlash
  
  /* Cross check that this size matches the expected. */
  PROVIDE ( __FLASH_TABLES_SIZE = __STMDATA_SECTOR_COUNT * __STMDATA_SIZE );
  PROVIDE ( __STMDATASECTION_AFTER = __STMDATASECTION_START + __FLASH_TABLES_SIZE );
  
    /* file system Flash configurations. */
  PROVIDE( __FS_DB_SECTOR_COUNT         = 0x0018   );
  PROVIDE( __FS_DB_SECTOR_SIZE          = 0x2000   );
  
  .safeFsFlash (NOLOAD):
  {
     PROVIDE( __FS_DB_SECTION_START = .); 

     *(.safeFsDBseg)
     . = ALIGN (0x4);
     . += ( __FS_DB_SECTOR_COUNT * __FS_DB_SECTOR_SIZE );

     PROVIDE( __FS_DB_SECTION_AFTER = .);
  } > SafeFatFsFlash

  PROVIDE ( __FS_DB_TABLES_SIZE = SIZEOF( .safeFsFlash ) );
  
  /*
  *   BitBand RAM - does not support in Cortex-M7
  */
  
  ._unsupervised_DMA_Ram (NOLOAD):
  {
    /* DMA and serial buffer RAM, memory accessed by ISRs is placed in a DMA RAM area.
    *  The actual name used is not especially important.
    *  Unsupervised RAM could be relocated into other RAM if space was an issue.
    */

    . = ALIGN(4);
    *(.DMA_RAM)

  } > ITCMRAM

  /*
  *   After Reboot RAm section - is used for storing the Reboot cause variables
  *   and Strings -  this section is also excluded from supervision
  *   and keeping this as part of Bit Band Section - move it to dedicated section if required
  */
  ._afterReboot_Ram (NOLOAD):
  {
    . = ALIGN(4);
    *(.AfterReboot_RAM)
    
  } > ITCMRAM

  /*
  *   Small Table Manager section - is used for storing the dynamic config records
  *   and Strings -  this section is also excluded from supervision
  *   and keeping this as part of Bit Band Section - move it to dedicated section if required
  */
  ._smallTableMgr_Ram (NOLOAD):
  {
    . = ALIGN(4);
    *(.SmallTableMgr_RAM)
    
  } > ITCMRAM
  
  /*
  *   RAM Data base use it based on need
  */
  ._fileSystem_RamDisk(NOLOAD):
  {
    . = ALIGN(4);
    *(.FileSys_RAM_Disk)
    
  } > DTCMRAM

  /* Uninitialized data section */
  . = ALIGN(4);
  .bss :
  {
    /* This is used by the startup in order to initialize the .bss secion */
    PROVIDE(___RAM_BSS_START = .);
    _sbss = .;         /* define a global symbol at bss start */
    __bss_start__ = _sbss;
    *(.bss)
    *(.bss*)
    *(COMMON)

    . = ALIGN(4);
    _ebss = .;         /* define a global symbol at bss end */
    __bss_end__ = _ebss;
  } >RAM
  
  _romp_at = ___ROM_AT + SIZEOF(.data);
  
  PROVIDE( __RAM_SIZE = 0x100000 - ( ___RAM_BSS_START - 0x24000000 ) - _Min_Stack_Size );

  /* User_heap_stack section, used to check that there is enough RAM left */
  ._user_heap_stack :
  {
    . = ALIGN(8);
    PROVIDE ( end = . );
    PROVIDE ( _end = . );
    . = . + _Min_Heap_Size;
    . = . + _Min_Stack_Size;
    . = ALIGN(8);
  } >RAM
  
  

  /* Remove information from the standard libraries */
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }

  .ARM.attributes 0 : { *(.ARM.attributes) }
}