#include "stm32f0xx.h"
#include "stm32f030x8.h"
#include "math.h"

#define Set_bit(Reg , bit) (Reg |= 1<<bit); 
#define Clr_bit(Reg , bit) (Reg &= ~(1<<bit));

void GPIO_Init(void);
void EXTI_Init(void);
void TIM3_Init(void);
void TIM1I_Init(void);
void UpdatePulse(void);

unsigned int i,i1=0,i2=0,i3=0,count,Ch1_DutyCycle=0,Ch2_DutyCycle=0,Ch3_DutyCycle=0,Ch1_Dir=0,Ch2_Dir=0,Ch3_Dir=0,Max_Duty=0,Start_Duty=0,Duty_Diff=0,Period=0;
unsigned int SinTable[200];
double x=0;
int main()
{
	/****start PLL setting for system clock at 48Mhz using 8Mhz HSI****/
	
	RCC->CFGR |= ((1<<19)|(1<<21));				// PLL Multification factor = 12
	RCC->CFGR |= (1<<1);									// PLL selected as system clock
	RCC->CR |= (1<<24);										// Enable / ON PLL
	while((RCC->CR & (1<<25)) == 0);			// Wait until PLL gets Ready
	
	/****PLL settigs end here****/
	

	Period = 1199;												// 40khz i.e. 20 khz in center aligned mode
	Max_Duty = 1080;											// 90%
	Start_Duty = 600;											// 50%	
	Duty_Diff = (Max_Duty-Start_Duty);
	
	x=0;	
	for(i=0;i<=49;i++)
	{
		x=x+0.03141592;
		SinTable[i] = Start_Duty+(Duty_Diff*(sin(x)));
	}
	for(i=50;i<=99;i++)
	{
		x=x+0.03141592;
		SinTable[i] = Start_Duty+(Duty_Diff*(sin(x)));
	}
	for(i=100;i<=149;i++)
	{
		x=x+0.03141592;
		SinTable[i] = Start_Duty+(Duty_Diff*(sin(x)));
	}
	for(i=150;i<=199;i++)
	{
		x=x+0.03141592;
		SinTable[i] = Start_Duty+(Duty_Diff*(sin(x)));
	}	
	
	i1 = 66;															// 120 degree W
	i2 = 132;															// 240 degree V
	i3 = 199;															// 0/360 degree U
	
	GPIO_Init();													// gpio initialization
	TIM3_Init();													// timer1 initialization
	TIM1I_Init();													// timer 1 interrupt initialization
	
	while(1)															// infinite loop
	{
			
	}
}

void GPIO_Init()
{
	RCC->AHBENR |= (1<<17);								// Enable clock for GPIOA	
	RCC->AHBENR |= (1<<18);								// Enable clock for GPIOB
	
	GPIOA->MODER |= (1<<17);							// PA8 in alternate function mode TIM1_CH1
	GPIOA->OTYPER &= ~(1<<8);							// PA8 as output push pull
	GPIOA->OSPEEDR |= ((1<<16)|(1<<17));	// PA8 at high speed
	GPIOA->PUPDR &= ~((1<<16)|(1<<17));		// PA8 no pull-up, no pull-down
	GPIOA->AFR[1] |= (1<<1);							// PA8 as TIM1_CH1 alternate function	
	
	GPIOA->MODER |= (1<<19);							// PA9 in alternate function mode TIM1_CH2
	GPIOA->OTYPER &= ~(1<<9);							// PA9 as output push pull
	GPIOA->OSPEEDR |= ((1<<18)|(1<<19));	// PA9 at high speed
	GPIOA->PUPDR &= ~((1<<18)|(1<<19));		// PA9 no pull-up, no pull-down
	GPIOA->AFR[1] |= (1<<5);							// PA9 as TIM1_CH1 alternate function	 TIM1_CH3
	
	GPIOA->MODER |= (1<<21);							// PA10 in alternate function mode
	GPIOA->OTYPER &= ~(1<<10);						// PA10 as output push pull
	GPIOA->OSPEEDR |= ((1<<20)|(1<<21));	// PA10 at high speed
	GPIOA->PUPDR &= ~((1<<20)|(1<<21));		// PA10 no pull-up, no pull-down
	GPIOA->AFR[1] |= (1<<9);							// PA10 as TIM1_CH1 alternate function	
	
	GPIOA->MODER |= (1<<15);							// PA7 in alternate function mode TIM1_CH1N
	GPIOA->OTYPER &= ~(1<<7);							// PA7 as output push pull
	GPIOA->OSPEEDR |= ((1<<14)|(1<<15));	// PA7 at high speed
	GPIOA->PUPDR &= ~((1<<14)|(1<<15));		// PA7 no pull-up, no pull-down
	GPIOA->AFR[0] |= (1<<29);							// PA7 as TIM1_CH1 alternate function	
	
	GPIOB->MODER |= (1<<1);								// PB0 in alternate function mode TIM1_CH2N
	GPIOB->OTYPER &= ~(1<<0);							// PB0 as output push pull
	GPIOB->OSPEEDR |= ((1<<0)|(1<<1));		// PB0 at high speed
	GPIOB->PUPDR &= ~((1<<0)|(1<<1));			// PB0 no pull-up, no pull-down
	GPIOB->AFR[0] |= (1<<1);							// PB0 as TIM1_CH1 alternate function	
	
	GPIOB->MODER |= (1<<3);								// PB1 in alternate function mode TIM1_CH3N
	GPIOB->OTYPER &= ~(1<<1);							// PB1 as output push pull
	GPIOB->OSPEEDR |= ((1<<2)|(1<<3));		// PB1 at high speed
	GPIOB->PUPDR &= ~((1<<2)|(1<<3));			// PB1 no pull-up, no pull-down
	GPIOB->AFR[0] |= (1<<5);							// PB1 as TIM1_CH1 alternate function	
	
	//Configuration of PA5 for interrupt debug
	Set_bit(GPIOA->MODER , 10);            // PA5 as general purpose output mode
	Clr_bit(GPIOA->OTYPER , 5);            // PA5 as output push pull
	GPIOA->OSPEEDR |= ((1<<10)|(1<<11)); 	 // PA5 at high speed
	GPIOA->PUPDR &= ~((1<<10)|(1<<11));  	 // PA5 as no pull-up, pull-down
	GPIOA->ODR &= ~(1<<5);
}

void TIM3_Init()
{
	RCC->APB2ENR |= (1<<11);								// Enable clock for TIM1
	
	TIM1->PSC = 0;
	TIM1->ARR = Period;																	// period
	
	TIM1->CR1  |= ((1<<5));															// Center-aligned mode 1.
	TIM1->CR1  |= ((1<<2));															// Only counter overflow/underflow generates an update interrupt
	TIM1->DIER = 1;																			// Update interrupt enable
	TIM1->RCR = 5;																			// update event after RCR+1 period
	
	TIM1->CCMR1 |= ((1<<4)|(1<<5)|(1<<6)|(1<<3));				// TIM1_CH1 is set to pwm mode-2
	TIM1->CCMR1 |= ((1<<12)|(1<<13)|(1<<14)|(1<<11));		// TIM1_CH2 is set to pwm mode-2
	TIM1->CCMR2 |= ((1<<4)|(1<<5)|(1<<6)|(1<<3));				// TIM1_CH3 is set to pwm mode-2
	
	Ch1_DutyCycle = SinTable[i1];											// 120 degree W
	Ch2_DutyCycle = SinTable[i2];											// 240 degree V
	Ch3_DutyCycle = SinTable[i3];											// 0/360 degree U
	TIM1->CCR1 = Ch1_DutyCycle;												// duty cycle
	TIM1->CCR2 = Ch2_DutyCycle;												// duty cycle
	TIM1->CCR3 = Ch3_DutyCycle;												// duty cycle
	TIM1->CCER |= ((1<<0)|(1<<2));										// TIM1_CH1, TIM1_CH1N is Active, active high 
	TIM1->CCER |= ((1<<4)|(1<<6));										// TIM1_CH2, TIM1_CH2N is Active, active high 
	TIM1->CCER |= ((1<<8)|(1<<10));										// TIM1_CH3, TIM1_CH3N is Active, active high 
	TIM1->BDTR |= (1<<15);														// main output enable	
	TIM1->BDTR |= (1<<14);														// automatic output enable
	TIM1->BDTR |= ((1<<5)|(1<<4)|(1<<3));							// dead time 1.16us
	TIM1->EGR = 1;																		// Reinitialize the counter and generates an update of the registers
	TIM1->CR1 |= 1;																		// TIM1 Counter enable
}

void TIM1I_Init()
{
  // interrupt enabling settings
	__NVIC_SetPriority(TIM1_BRK_UP_TRG_COM_IRQn, 0);
	__NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn);
}

void ISR()
{
	
	UpdatePulse();
	GPIOA->ODR ^= (1<<5);																// toggle PA5
	TIM1->SR = 0;																				// clear update interrupt flag
}
void UpdatePulse()
{
		i1++;
		if(i1>199)
		{
			i1=0;
		}
		Ch1_DutyCycle = SinTable[i1];
		
		i2++;
		if(i2>199)
		{
			i2=0;
		}
		Ch2_DutyCycle = SinTable[i2];
		
		i3++;
		if(i3>199)
		{
			i3=0;
		}
		Ch3_DutyCycle = SinTable[i3];
		
		TIM1->CCR1 = Ch1_DutyCycle;												// duty cycle
		TIM1->CCR2 = Ch2_DutyCycle;												// duty cycle
		TIM1->CCR3 = Ch3_DutyCycle;												// duty cycle		
}