////////////////////////////////////////
// Module_STM32F496xG.h - Memory Map for STM32F496xx Processor
// Copyright (c) 2021 Port Electric Solutions Inc.
////////////////////////////////////////
#ifndef _MCU_STM32L496xG_H
#define _MCU_STM32L496xG_H

#include "main.h"	// Include main.h to see which HAL header is included

// For all STM32 MCUs the code space is organized as follows:
// BANK 1:
// 1. BOOTLOADER Vector Table 	(0x08000000), 2kB   = 1 sector
// 2. FACTORY_FLASH				(0x08000800), 2kB   = 1 sector
// 3. BOOTLOADER				(0x08001800), 122kB = 61 sectors
// BANK 2:
// 1. DATA_FLASH 				(0x08001000), 2kB   = 1 sector
// 2. App 						(0x08020000), 510 = 255 sectors

////////////////////////////////////////
// SECTION: Code space definitions for this MCU = STM32L476VG
// Bank = half of FLASH = 256 sectors (512MB)
// Page==Sector==2KB
// BL=Bootloader	= Starts at default boot address 0x08000000
// FF=Factory FLASH	= 1 Sector, only written at factory during BL setup
// DF=Data FLASH	= 1 sector, May be re-written by App or BL (change Bootload/AppLoaded flag)
// AF=App Flash		=
////////////////////////////////////////
//#define FLASH_BASE            	(0x08000000UL) /*!< FLASH(up to 1 MB) base address  */
//#define FLASH_END             	(0x080FFFFFUL) /*!< FLASH END address               */
//#define FLASH_BANK1_END       	(0x0807FFFFUL) /*!< FLASH END address of bank1      */
//#define FLASH_BANK2_END       	(0x080FFFFFUL) /*!< FLASH END address of bank2      */

#define D1_FLASH_BANKS				(2)					//Two Banks 2*256*2K=1024KB (CPU on hold while writing to same bank as running code from)
#define D1_FLASH_BankSectors		(256)				//Two Banks 256*2K=512KB/bank

#define D1_FLASH_SECTOR_SIZE 		(0x800)				// Size FLASH Sectors in STM32L4xx (2KB)
#define D1_FLASH_SIZE_KB 			(1024)				// Length of the entire flash

#define D1_FLASH_FF_ADDR 			(0x08000800UL)		// FF Address
#define D1_FLASH_FF_BANK 			(0)					// FF Bank
#define D1_FLASH_FF_SECTOR 			(1)// FF Sector in Bank

#define D1_FLASH_BL_ADDR_START 		(0x08001800UL) 		// BL Start Address (usually beginning of code/flash space)
#define D1_FLASH_BL_BANK 			(0)	  				// BL in FLASH Bank 0
#define D1_FLASH_BL_SECTOR_START	(3)		  			// BL 4th Sector in Bank
#define D1_FLASH_BL_SECTORS 		(61U)	  			// BL Max Sectors
#define D1_FLASH_BL_SECTOR_SIZE 	D1_FLASH_SECTOR_SIZE	// BL Sector Size

#define D1_FLASH_DF_ADDR 			(0x08080000UL)  	// DF Address
#define D1_FLASH_DF_BANK 			(1)					// DF Bank
#define D1_FLASH_DF_SECTOR 			(0)//DF Sector in Bank

#define D1_FLASH_AF_ADDR_START   	(0x08080800UL) 			// AF Address == App Code Entry Address (Vector Table)
#define D1_FLASH_AF_BANK		 	(1)						// AF Bank (Future allow larger App code in multiple Banks)
#define D1_FLASH_AF_SECTOR_START 	(1) // AF Sector 65
#define D1_FLASH_AF_SECTOR_SIZE  	D1_FLASH_SECTOR_SIZE	// AF Sector Size
#define D1_FLASH_AF_ADDR_END  	 	(FLASH_END) 			// AF End Address

// DFU Mode Defines
#define D1_DFU_FLAG_SET				(0xAAAAAAAAUL)					  // Flag = enter DFU mode
#define D1_DFU_FLAG_RESET           (0x00000000UL)					  // Flag = don't enter DFU mode
#define D1_DFU_ADDR					(0x1FFF0000UL)					  // Starting address of SystemMemory (DFU bootloader)

#endif /* _MCU_STM32L476xG_H*/
///////////////// End Module_STM32F476xG.h ///////////////////////