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Bug in the STM32F4xx std peripheral library

Question asked by chernikov.vasily on Jul 10, 2015
Latest reply on Jul 10, 2015 by Majerle.Tilen
Hello everybody. I've found a little bug in the STM32F4xx standard peripheral library and since I'm not sure where to report it I decided to post it here.

So, this bug is located at STM32F4xx_DSP_StdPeriph_Lib_V1.5.1\Project\STM32F4xx_StdPeriph_Templates\system_stm32f4xx.c. It is said in its comments, for STM32F40xxx/41xxx devices:
  *        SYSCLK(Hz)                             | 168000000
  *        HCLK(Hz)                               | 168000000
  *        PLL_N                                  | 336
but PLL_N is set actually to 360 in the following lines:
#if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx)
#define PLL_N      360
#define PLL_P      2
#endif /* STM32F40_41xxx || STM32F427_437x || STM32F429_439xx || STM32F446xx */
My STM32F417 MCU still runs well at the resulting frequency (180 MHz), but CMSIS-RTOS kernel functions are working incorrectly because of difference between SystemCoreClock variable value and actual core frequency.
Hope this will be corrected in the future releases.