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Error in section 5.4.4 of the STM8 CPU programming manual

Question asked by Philipp Krause on Aug 2, 2015
The text claims that incw y writes x and thus Figure 12 shows a pipline stall at the following ld a, (x). But incw y does not write x, and in fact Figure 12 does not show a pipline stall.

I suggest to fix this section, and also add an additional section showing what happens when a memory write is followed by a read (e.g. push followed by pop).