On 30-06-2008 at 18:04, Anonymous wrote:
Sorry - check example 4 in the SPI Library.
Noted that your function call "order" is different than that in the library. Look especially @ your placement of:
SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;
On 02-07-2008 at 13:37, Anonymous wrote:
I made a workaround. I am contolling the Slave Select by using it as a normal I/O port, and then using the Transmit buffer empty falg and the bussy flag.
I think that the NSS output is only used when you are dealing with Multimasters.
There is no issue with NSS management...NSS hardware toggling available...
Yes, there is no issue with NSS behavior for F1, F2 and F4 MCUs.
Before explaining how, I want to inform you that the behavior you are expecting is available with F0 and F3 families.
Now to explain the current behavior for F1, F2 and F4:
NSS pin is driven low by the master to inform that all the other connected SPIs are potentially slave. This signal remains active and forced by the master until the master is becoming slave or is disactivated (switched-off, SPE=0 in SPI_CR register).
It means if a master sends a data and stops for a moment before sending another data, NSS pin will stay low.
The utility of the NSS hardware mode depends on the use case:
- Point to point SPI communication: NSS OUTPUT pin is not mandatory to be used for a master. This feature is a way for a master to control its slave forcing NSS pin low as soon as it is the master of the communication.
- Multi-Slave mode: There is one master and more than two slaves. In this case, there is no need to use NSS HW mode, since for each slave you need a dedicated GPIO to select it.
- When there are more than two SPIs connected on the bus, and more than one could function as Master. It is NEEDED to use NSS HW output to know who the master is at the beginning of the session. In this case the other master(s) should manage that the NSS line could go low and in this case behave as slave(s) or stay inactive. Here the NSS HW output is NEEDED to know each time who is the master. In this case, all the NSS pins of all SPIs should be connected together. When an SPI wants to broadcast a message, it has to pull NSS down to inform all others that there is now a master for the bus.
I hope this post will clarify the NSS Hardware management feature.
So, for the ones who want it, you can switch to F3 or F0 and check the NSS hardware toggling feature.
/* SPI2 init function */
hspi2.Instance = SPI2;
hspi2.Init.Mode = SPI_MODE_MASTER;
hspi2.Init.Direction = SPI_DIRECTION_2LINES_RXONLY;
hspi2.Init.DataSize = SPI_DATASIZE_16BIT;
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi2.Init.TIMode = SPI_TIMODE_DISABLED;
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
hspi2.Init.CRCPolynomial = 7;
hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
hspi2.Init.NSSPMode = SPI_NSS_PULSE_DISABLED;
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* USER CODE BEGIN SPI2_MspInit 0 */
/* USER CODE END SPI2_MspInit 0 */
/* Peripheral clock enable */
/**SPI2 GPIO Configuration
PA8 ------> SPI2_SCK
PA9 ------> SPI2_MISO
PA11 ------> SPI2_NSS
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
GPIO_InitStruct.Pin = GPIO_PIN_11;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
/* Peripheral interrupt init*/
HAL_NVIC_SetPriority(SPI2_IRQn, 5, 0);
/* USER CODE BEGIN SPI2_MspInit 1 */
/* USER CODE END SPI2_MspInit 1 */
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