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Bit set/reset timing

Question asked by stevens.mark on May 18, 2014
Latest reply on May 19, 2014 by EtaPhi
I am doing some work which requires precise timing and I think the STM8S can do what I need.  In order to prove this I setup a simple program which toggles PD0 in a while loop.

I am using the IAR compiler and it compiles the following:

PD_ODR = 0;
PD_ODR = 1;


to:

clr PD_ODR
mov PD_ODR, #?b1


The clear instruction operates in 1 clock cycle but the mov takes 2 cycles.  I decided to try the inline assembler and changed the C statement to:

asm("bres PD_ODR, #0");
asm("bset PD_ODR, #0");


PM0044 states that these instructions should take 1 cycle each but they both appear to take 2 cycles.

Has anyone seen this?  I'm wondering if PM0044 is correct.

Regards,
Mark

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