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Timer synchronicity between channels

Question asked by stotz.dieter on Nov 27, 2013
Latest reply on Jun 25, 2014 by das.anil_kumar

I am using a STM8L151K6T3 and need for synchronous rectifier purposes two clock signals with the same frequency, which both have to be absolutely of a symmetric rectangle shape. Secondly I do need a possibility to adjust the phase between these two clocks. Thus I decided to use Timer1 with two channel outputs and toggle mode.

For initializing there are two lines:

TIM1-> CCMR1 = 0b00111000; //Preload enable, OCM = 011 (Toggle), CC1S output                                                        
TIM1-> CCMR2 = 0b00111000; //Preload enable, OCM = 011 (Toggle), CC2S output

The phase adjusting is done by these:

TIM1-> CCR2H = 0;
TIM1-> CCR2L = Par_SG_Phase;

If I omit the lines of (1), then it happens sometimes that both clocks could jump in phase of 180°(thus one clock is inverted) when a phase adjust event is there. Of course

this is unwanted. But is it guaranteed that with (1) the phase relationship is frozen forever? Or can it happen again by an interference or so?

I think, because in toggle mode we have two independent flipflops driven by Timer1, the states of the flipflops are defined at the very beginning after initializing only. Or what does the Preload enable exactly? The reference manual for the STM8 is not clear for me at the place where CCMR register is described.

I have to add, that I never ever had noticed any event of the above described phase inversion, since (1) was added into my code. Everything else is working fine, but I still worry about this, because an occur could have fatal results.

Best regards