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How to set wait-state for XFLASH

Question asked by lehmann.lars on Feb 23, 2011
Latest reply on Jun 13, 2011 by Kenshin
Hello everybody,

I am using a ST0F276Z at 64MHz. In the User Manual (UM0409 - Rev2 - Oct 2007) on page 42 i read:

"The ST10F276Zx reserves an address area of 512+320 Kbytes for on-chip Flash memory. [...]
The second portion [of flash](320 Kbytes) appears like an on-chip X-Peripheral: it can be accessed like an external memory in 16-bit demultiplexed bus-mode without read/write delay at zero wait-states with CPU frequency up to 40 MHz, while one wait-state should be added for higher frequency rates."

I wounder how to add these wait states? Somewhere else I read, that the bus configuration registers of the X-Peripherals are normally hard wired. These "registers" are called XBCONx and XADRSx. Except of XADRS3, i did not found setup information about these registers.

Question: How can I realize the recommended wait state, when using the processor at 64 MHz.

Kind regards
Lars

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