I've been designing sub-gram boards for data logging on songbirds using the stm32l432. Although mostly I use ultra-low power external RTCs, I recently built a test board using a 4pf 32768 crystal. The question was then how to determine the load capacitors. After reading the relevant ST appnote and stm32l432 datasheet I assumed that the pin capacitance was ~5pf and, given the simple board, minimal stray capacitance. This suggested 3pf load capacitors((4-5/2)*2) and a load error of 1.5pf without capacitors. With a predicted error of 125ppm/pf, I thought it reasonable to try without any additional capacitors in the hopes of saving board real estate in the final design. I did include capacitor footprints for my test board. Upon testing, I found an error > 800ppm which was surprising for two reasons -- it suggested a much larger load error than 1.5pf and also made clear that the formula for predicting error didn't work at these extremes.
To cut to the chase, I found a derivation for a load equation that wasn't just a simple linear equation and used that to compute the correct load capacitors (see attached python code) which is ~5.8pf. This means the pin capacitance is about 2pf and not the 5pf ST quotes. I then wondered about the nucleo boards. In looking at the bom for the stm32l432 nucleo 32, the crystal is 6pf and the load capacitors are 10pf (6-10/2) = 1pf -- so 2pf pin capacitance !