In my application, I am trying to interface a pressure sensor to the STR73x on BSPI1. The sensor will send pressure information to the STR73x, so the operation is pure receive mode. I have configured the BSPI1 as Master, have Masked the SS, and have setup a RX FIFO that's 10 words (16-bit) deep.
My question is about how to initiate the receive operation. My understanding is that the SS will be asserted low when something is written to the BSPI transmit data register, but how long with this assert the SS for? Do I need to periodically write to the transmit data register to assert the SS?
Another question I have is about the RX FIFO. I have configured the BSPI to trigger an interrupt to the processor when the RX FIFO is full. So when this happens, how will I be able to access all the 10 words of the RX FIFO? Not sure how to do this - would I have to use &(BSPI1->RXR) as the pointer to the base of the FIFO?
I appreciate any help.