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[STM32L0:SPI] Hard output NSS

Question asked by Joris COLLOMB on Jun 8, 2018
Latest reply on Jun 12, 2018 by waclawek.jan

Hi,

 

I'm trying to use the hardware controled NSS pin, but I'm getting some trouble.

 

According to the Reference Manual:

 

"The NSS signal is driven low as soon as the SPI is enabled in master mode (SPE=1), and is kept low until the SPI is disabled (SPE =0)."

 

-The HAL enable the SPI at transmission, but never disable it. (I'm in 2 line full duplex mode) So, if I want a correct behavior of the NSS pin (return to high after the end of a transaction), I must disable the SPI after call of HAL function? That's how I made it in my code:

HAL_SPI_Transmit(&hspi,dataTx,4,HAL_MAX_DELAY);
HAL_SPI_Receive(&hspi,dataRx,5,HAL_MAX_DELAY);
__HAL_SPI_DISABLE(hspi);

This code work correctly.

 

-But I've notice a issue if I use this code:

status  = HAL_SPI_Transmit (hspi, &opcode, 1, HAL_MAX_DELAY);
status |= HAL_SPI_Receive (hspi, &response, 1, HAL_MAX_DELAY);
__HAL_SPI_DISABLE(hspi);

opcode = PROGRAM_ERASE_BUFF1_OPCODE;

status |= HAL_SPI_Transmit(hspi, &opcode, 1, HAL_MAX_DELAY);
status |= HAL_SPI_Transmit_IT(hspi, data, size);
__HAL_SPI_DISABLE(hspi);

I want NSS to go low, send 1 byte, receive 1 byte, NSS to go high, go low again, send 1 bytes, receive x bytes in non-blocking mode (I add a "__HAL_SPI_DISABLE(hspi)" in the RxCallback).

 

But the behavior is unexpected: NSS don't go high after first Receive/Transmit, and stay low until the end of x bytes reception.

If I put a breakpoint between the two transaction, the behavior of NSS is as expected.

 

 

So the SPI module have a issue with the hardware control of NSS pin if we enable/disable it to fast.

Am I correct?

 

Thx

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