I started to work with STNRGPF01 for a PFC, but i have a few questions, maybe someone could pin this post for the future questions about this device because i think that on my way i will have a few more. I want to thanks in advance to anyone willing to help!
1. On every not-native PWM channel (1,2) there is a low-pass filter on the SET1/RESET1, why is that one needed?
2. On the PWM0/1/2 there is a cap (around 100pF) with a resistor in series, kind of reversed low-pass filter, again why it is needed? And what is that exactly?
3. On the SET1/RESET1 at the input of every 74HC132 NAND, there is also an external pull-down which has the label not mounted. This is, again, just a safety measure or it is really needed? (in case the internal pull down it is not capable enough)
4. Why did you choose to work with 3.3V logic and not with 5V on the development board available? The IC and every op-amp could work with 5V also.
Thanks a bunch,