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APB1ENR Power interface clock enable bit

Question asked by Ravindra Waghode on Jun 7, 2018
Latest reply on Jun 7, 2018 by waclawek.jan

I am using stm32F0 and Stm32L0 series MCUs.

 

APB1ENR in Stm32 has Power interface clock enable bit (Bit 28). I have gone through the reference document to unserstand what is its significance.  

 

Bit 28 PWREN: Power interface clock enable
Set and cleared by software.
0: Power interface clock disabled
1: Power interface clock enabled

 

Please help me to understand it. 

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