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Clarification on STM32F373 VDDSD less than VDD while using SDADC

Question asked by First Lasterson on May 17, 2018

Datasheet reads: 


PB0 and PB1 pins are powered from VDD power supply. However, PB0 and PB1 are also
sharing SDADC1 analog inputs. Therefore the maximum voltage connected to these pins
when they are not used as analog inputs must be less than the minimum of VDD and
VDDSD12 supply voltages to avoid current injection into VDD and VDDSD12.
If VDD is higher than VDDSD12, it is forbidden to use PB0 and PB1 in digital output mode to
avoid current injection from VDD supply into VDDSD12 supply through shared analog inputs


I am using a separate precision 3.3v analog reference for VDDA and VDDSD from my VDD supply, which is a 3.3v regulator.  They are APPROXIMATELY the same voltage, but I am concerned with current injection from PB0 and PB1 pins.  I am planning to use those pins as a TSC sampling and active shield. 

I read that to mean any VDD voltage over VDDSD12 will get injected into VDDSD12 when pins PB0 or PB1 go high.  Is there a threshold (schottky diode drop) for this current injection or is it absolute?  My digital 3.3v regulator will vary from device to device somewhat, and may be higher or lower than the precision 3.3v ref.