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Getting started question -- do I have to enable the STM32F7 cache?

Question asked by Chris Rice on May 1, 2018
Latest reply on May 1, 2018 by Chris Rice

Hello, I'm moving from 8-bit programming to an STM32f769, and it's a bit overwhelming.  I've been combing through source code and the datasheets, trying to decide where to use the supplied code and where to write my own.  I feel like writing my own is generally better because I will be closer to the hardware and understand more.  But it's pretty deep/complex with this kind of CPU.

 

My question is, the first command in the sample applications provided start with CPU_CACHE_Enable, which call SCB_EnableICache and SCB_EnableDCache, which manipulate the SCB-->ICIALLU, SCB-->CCR, and other registers.

 

Please forgive my naivete, but I'm coming from CPUs that don't even allow you to manipulate the cache... what if I don't do this (enable the cache)?  Is this an optimization, or something that is necessary to do?  If necessary, why is it even in code, why isn't it the reset behavior?

 

Thank you.  I'm unable to find a description at the right level for me, so any answers will be very helpful and get me pointed in the right direction (beyond the specific answer, I'm sure).

 

Thanks.

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