I used a one pulse mode master signal that triggers a slave timer. The slave timer then generates a one pulse waveform with repetition counter set to 5.
I want to generate the signal above, It receives a pulse called drdy and is fed by an external clock at a frequency of 24 MHz. After the DRDY pulse it should remain low for 16 rising edges of the external clock, then it should toggle a pin 12 times, each toggle after 8 clock pulses,after which it should stop till the next drdy pulse.
The latency on just using the timer to generate this is too long, I'd need the rise time and reaction of the signal to be sub 20 ns. Could I implement a DMA with the timer to generate this for very low latency?
Thanks in advance for any help!