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STM32F103 Timer Interrupt Issue

Question asked by abbasi.muhammad_umar on Apr 24, 2018
Latest reply on Apr 26, 2018 by T J

Hello, I am using a stm32f103c8 micro-controller. I am using STLINK/V2 for debugging in MDK-ARM v5 environment.

I have programmed TIMER 3 in simple PWM mode using code from Standard Peripheral Library (SPL) example. The code is attached below for reference:


TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
uint16_t CCR1_Val = 333;


/* Compute the prescaler value */
PrescalerValue = (uint16_t) (SystemCoreClock / 24000000) - 1;
/* Time base configuration */
TIM_TimeBaseStructure.TIM_Period = 665;
TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);


/* PWM1 Mode configuration: Channel1 */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;

TIM_OC1Init(TIM3, &TIM_OCInitStructure);

TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);

TIM_ARRPreloadConfig(TIM3, ENABLE);

/* TIM3 enable counter */


NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;


Basically this software simply configures the TIMER 3 to produce a square wave with 50% duty cycle. Now I have enabled Timer Update Interrupt as well because I want interrupt every time counter overflows. The Timer ISR is given below:


void TIM3_IRQHandler(void)
if(TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET)
TIM_ClearITPendingBit (TIM3,TIM_IT_Update);
GPIO_WriteBit(GPIOC, GPIO_Pin_14, (BitAction)(1 - GPIO_ReadOutputDataBit(GPIOC, GPIO_Pin_14)));

The ISR simply toggles a GPIO pin which is connected to oscilloscope for viewing.

Now, I understand that every time the counter overflows, the interrupt TIM_IT_Update should fire and the ISR should execute immediately. The ISR above simply toggles an IO, so the IO pin should change almost immediately after interrupt. However, I have achieved the result as shown in picture attached:

In image, the yellow trace is the PWM output of timer 3 and the blue trace is the GPIO being toggled in ISR. The issue I have is that there seems to be a delay between two wave shapes. The delay is almost 1us. This implies that either the ISR is being executed with a delay, i.e. the interrupt doesn't fire immediately after counter overflow, or there is some delay in the ISR itself. 

The SystemCoreClock is 72 MHz. So my guess is that the interrupt is being fired with a delay. I have also tried disabling Systick interrupts. The result remains the same. I will appreciate any help in this regard. Thanks.