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STM32F334 SPI TI Mode

Question asked by Manu Abraham on Apr 4, 2018
Latest reply on Apr 6, 2018 by T J

Hi,

 

Trying to establish SPI communications from a STM32F334 with a DRV8305 from TI using SPI, after a bit of struggling thoughts and struggles to establish valid communication with the slave; arrived at the thoughts that TI mode is necessary for establishing SPI communications with the Slave.

 

The STM32F334 is connected to the DRV8305 with the following schema:

NSS  --> nSCS

SCK  --> SCLK

MISO --> SDO

MOSI --> SDI

 

I am getting weird register reads, which is not expected according to the DRV8305 datasheet

http://www.ti.com/lit/gpn/drv8305

 

I am reading all the 12 registers (default values of registers 5, 6, 7 seem to be incorrect from the reads), writing default value (0x344 to registers 5, 6, 7) and reading back all the 12 registers again. Somehow, it appears that the writes are not even going to the corresponding registers, nor the reads are reading back the expected written values. Sigh!

 

My first thought was that, the TI mode was necessary for the SPI Frame format and that NSS needs to asserted High for at least 500nS in between frames. As such I chose to use NSS to be hardware controlled and to use the NSS pulse mode. But that helped in reading something from the Slave, but the read values do not seem to be relevant either.

 

Tried connecting a scope to the SPI pins, but after connecting the scope, all my reads are then "0"'s.

 

Looking for the bug in the SPI read/write functions and feeling a bit lost; I wonder whether someone has any pointers to identify the issue.

 

Thanks in advance,

 

Manu

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