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STM32F7 - FMC SDRAM & NAND operation problem

Question asked by JunBeom Kim on Mar 26, 2018

Hello ?


My company is Korean distributor for Draupner Graphics, TouchGFX product.

I am supporting ST Korea's TouchGFX users.


I have technical issue regarding FMC SDRAM and NAND co-operation problem because SDRAM and NAND share data bus from D0 to D7.

On referencing, NAND HAL driver API is working very well according to below URL's guide. (especially, Bank configuration).


On referencing, SDRAM is used for TouchGFX's framebuffer. SDRAM/framebuffer is updated by DMA2D operation using LTDC's VSYNC interrupt(interval 16.67ms).

Whenever NAND testing button is clicked, NAND HAL Driver API is called. The NAND access operation is executed very well.

But, Whenever NAND HAL API is called by clicking button, TouchGFX's LCD screen is flicked.


I think that there are two cases in my code's operation.


1) If NAND HAL API is called in case that DMA2D operation for SDRAM is processed, NAND memory access is delayed by FMC's bus arbitrator.

2) If NAND HAL API is called before SDRAM access operation by DMA2D is started, SDRAM memory access by DMA2D will be blocked(or delayed) because SDRAM/framebuffer is updated by VSYNC interrupt.


There is not any problem about NAND R/W operation about two cases.

I guess that because SDRAM/framebuffer update is delayed by NAND access operation, there is possibility for not updating framebuffer correctly.


1st question) My theory about two cases is correct ?


2nd question) I would like to add mutual exclustion mechanism on NAND HAL API. that is, NAND HAL API should be called in FMC's bus idle status only. Is there a correct API for checking FMC's bus idle status ?


At this time, I am thinking DMA2D TC(Transmit Completion) callback function. but, because serveral DMA2D operation are processed on period of VSYNC interval, I can't check final DMA2D operation.


Please advise me.


Best Regards,

JunBeom Kim / EmbedCoreTech