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Which internal memory address is memory mapped QUAD SPI mapped to?

Question asked by David Harrison on Mar 11, 2018
Latest reply on Mar 13, 2018 by Nesrine M

Hi, I want to setup my STM32F767 QUAD SPI peripheral to access an external NOR FLASH chip in memory mapped mode.


I can see from the STM32F76xxx reference manual how to set the QUADSPI->CCR register to set the FLASH memory command and frame format to configure it in memory mapped mode. Besides setting the CCR register, is there anything else I need to do, apart from the Timeout counter etc., to setup to operate it in memory mapped mode?

But I have not found anywhere in either the datasheet or the reference manual that defines which internal memory addresses are used to map the QUAD SPI peripheral to when it is operated in the memory mapped mode for reading from the FLASH chip.

Does anyone know this?