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STM32L432 LSE startup timeout with CSS enabled

Question asked by Darius B on Mar 9, 2018

if Clock security system on LSE is enabled:

After a few power on/off/on cycles, Clock security system protection always is triggered.  Only power off for more 5s will reset protection bit.

Currently I disabled clock security system  (CSS).

What is possible solutions to leave  CSS enabled and avoid power on/off problem?



Darius Babrauskas