AnsweredAssumed Answered

SMT32F7; FMC with SDRAM & NAND Problem.

Question asked by David George on Feb 16, 2018
Latest reply on Feb 21, 2018 by David George

I have a problem with an STM32F767 on a custom board with SDRAM and NAND SLC memory connected to the FMC.

The NAND is 8 bit, the SDRAM is 32bit, so only the [D0:D7] signals are shared between the SDRAM and the NAND.

 

  • When both the SDRAM and the NAND are configured & working any NAND data read is corrupted randomly.
  • When just the NAND is configured the NAND data read is correct.
  • The SDRAM always works fine with or without the NAND.

 

The LTDC uses the SDRAM to hold its frame buffer - it uses the DMA2D to read the current frame from SDRAM at regular intervals.

 

The SDRAM initialises and tests ok, I can see good display data on my display (no bad pixels or image corruption).

However when I test the NAND (Erase a block, read Pages from the Block) I get random read errors that don't reproduce the next time the Page is read (1 Page = 2048 bytes).

 

If I then disable the LTDC "__HAL_LTDC_DISABLE(&hltdc);" the NAND works perfectly with no read errors.

 

So I conclude the DMA2D reading the SDRAM is causing interference when reading the NAND?

Is there a way of locking the FMC while reading from the NAND, or if the FMC memory reads get interlaced should this be ok?

 

Example.

DMA2D is reading a LTDC frame from the SDRAM (431KB of data) using the FMC.

A NAND Read starts using the FMC - does this interrupt the DMA2D read process? or do they get mixed up?

 

Any help or pointers would be appreciated.

Outcomes