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STM32F405 for our DSP application for BLDC motor control.

Question asked by mahadoria.gajraj_sin on Feb 14, 2018

We are selecting STM32F405 for our DSP application for BLDC motor control. In that regard, we have some queries.


  1. Six independent PWM outputs for BLDC motor control: We understand that the 6-step PWM generation function is more relevant for enabling independent control of the CHx (Channel output) and CHxN (Complementary) outputs. We think that this is achieved by disabling the complementary channels, as and when needed. Can we get confirmation on this
  2. ADC triggering:  We would like to trigger our ADC at the center of the PWM positive pulse as shown in the figure below.
  1. We understand that the MMS bits in the TIMx_CR2 register enables the TRGO (trigger output) configuration for synchronization with slave devices.

We would like to set this in 011 – compare pulse mode for generating a trigger wrt PWM level. Is this option feasible for triggering the ADC sampling at the center of the PWM pulse? We need some help on the settings for the same?


We understand that the CMS bits in TIMx_CR1 register enables the center-aligned mode and triggers the output compare interrupts.
Does the arrow mark representation in the below timing diagram, represent the interrupt events? This seems to be edge triggered wrt PWM outputs. Can we configure this to be level triggered (center aligned)?

If yes, how do we do this? Can we use this interrupt for triggering the ADC sampling?