Juergen Marquardt

STM32F071, Clock Configuration Tool (AN4055) and Keil MDK5

Discussion created by Juergen Marquardt on Feb 14, 2018
Latest reply on Feb 14, 2018 by AvaTar

By default, startup code of a Keil MDK5 project for F071 (Cortex-M0) uses 8MHz internal HSI RC oscillator.
Now got hardware, which has populated an external crystal (12 MHz) at Pins PF0 and PF1.
So now want to change processor clock to 12 MHz, 24 MHz or 48 MHz.
Used the ST Clock Configuration Tool (AN 4055, STSW-STM32088, V1.0.1) for this.
Updated my project with the generated file system_stm32f0xx.c.

 

But Keil MDK cannot translate without errors. From where to get these missing definitions?

 

*** Using Compiler 'V5.06 update 5 (build 528)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
creating preprocessor file for system_stm32f0xx.c...
compiling system_stm32f0xx.c...
D:\Test1\src\system_stm32f0xx.c(130): error:  #147: declaration is incompatible with "const uint8_t AHBPrescTable[16]"  (declared at line 75 of "C:\Keil_v5\ARM\PACK\Keil\STM32F0xx_DFP\2.0.0\Drivers\CMSIS\Device\ST\STM32F0xx\Include\system_stm32f0xx.h")
 
_I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
D:\Test1\src\system_stm32f0xx.c(235): error:  #20: identifier "HSI_VALUE" is undefined
        SystemCoreClock = HSI_VALUE;
D:\Test1\src\system_stm32f0xx.c(238): error:  #20: identifier "HSE_VALUE" is undefined
        SystemCoreClock = HSE_VALUE;
D:\Test1\src\system_stm32f0xx.c(242): error:  #20: identifier "RCC_CFGR_PLLMULL" is undefined
        pllmull =
CC->CFGR & RCC_CFGR_PLLMULL;
D:\Test1\src\system_stm32f0xx.c(253): error:  #20: identifier "RCC_CFGR2_PREDIV1" is undefined
          prediv1factor = (
CC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
D:\Test1\src\system_stm32f0xx.c(294): error:  #20: identifier "HSE_STARTUP_TIMEOUT" is undefined
    } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
D:\Test1\src\system_stm32f0xx.c(317): error:  #20: identifier "RCC_CFGR_PLLMULL" is undefined
     
CC->CFGR &= (uint32_t)((uint32_t)~(
CC_CFGR_PLLSRC |
CC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
D:\Test1\src\system_stm32f0xx.c(318): error:  #20: identifier "RCC_CFGR_PLLSRC_PREDIV1" is undefined
     
CC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL4);
D:\Test1\src\system_stm32f0xx.c(318): error:  #20: identifier "RCC_CFGR_PLLXTPRE_PREDIV1" is undefined
     
CC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL4);
D:\Test1\src\system_stm32f0xx.c(318): error:  #20: identifier "RCC_CFGR_PLLMULL4" is undefined
     
CC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL4);
src\system_stm32f0xx.c: 0 warnings, 10 errors
"src\system_stm32f0xx.c" - 10 Error(s), 0 Warning(s).

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