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S2-LP I/Q data GPIO pins

Question asked by Levi Mariën on Feb 13, 2018
Latest reply on May 15, 2018 by Winfred Lu



I have a question about the STEVAL-FKI868V1 development kit that is based on the S2-LP sub 1GHz transceiver. We have a system that works at 868MHz and the signal that commes from the system is fed into multiple TI CC1120 transceivers. The transceivers are configured so that the IQ data is outputed on the GPIO pins from the 1-bit Sigma-Delta ADC. The major problem is that the transceiver don't have a lot of documentation on the subject of extracting the IQ data out of the transceiver so we have faced a lot of issues. 

Since we've faced a lot of issues we want to move to other transceivers and looked at the S2-LP transceivers.


In the datasheet we found the following:

The receiver architecture is low-IF conversion, the received RF signal is amplified by a two-stage low-noise amplifier (LNA) and down-converted in quadrature (I and Q) to the intermediate frequency (IF). LNA and IF amplifiers make up the RX front-end (RXFE) and have programmable gain. At IF, the ADCs digitalize the I/Q signals. The demodulated data go to an external MCU either through the 128-byte RX FIFO, readable via SPI, or directly using a programmable GPIO pin.

So therefore the following questions:

  1. Is it possible to extract the I/Q data from the S2-LP via the GPIO pins?
  2. At what data rate will this data come out?
  3. In what format will the data be outputted?


Thank you .