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HSI/2 before PLLSRC in STM32F030xC ?

Question asked by Peter M on Jan 26, 2018
Latest reply on Feb 25, 2018 by Peter M

Hi,

I have a problem with the PLLSRC of a STM32F030RC : to obtain 24MHz for the sysclk I have to use PLLMUL @ x6 with HSI (8MHz) but 6x8 = 48MHz ?

If I output the sysclk on a MCO pin (with no div) I have actually 24MHz.

After use of SystemCoreClockUpdate() from system_stm32f0xx.c the variable SystemCoreClock equals to 48000000 and my call to SysTick_Config(SystemCoreClock/1000) gives a wrong systick frequency ( 2 x too slow, the actuel sysclock is 24000000).

 

In the reference manual RM0360 at the figure 11 I see no div /2 between HSI and PLLSRC for my STM32F030xC.

But the behaviour seems like in the figure 10, with a /2 ....

 

Where is the mistake ?

Thanks

Peter

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