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3phase - 6PWM  Low-side legs are overlaping

Question asked by anton.bogdan on Jan 25, 2018

Hello,

 

i am using stm32f427 for driving 6pwms for a 3phase inverter trough advanced timer1.

 

Between some debug sesions, i noticed this "strange" behaviour.

 

At first glance everything seems normal ( like in the picture shown bellow)

[IMG]http://i64.tinypic.com/nfpcok.png[/IMG]

 

But after checking some current spikes, i noticed  for example Phase WL is still active for 2-3 uS  while  pin UL is switched active, like in the picture bellow

The same behaviour is noticed between UL and VL also.

 

[IMG]http://i65.tinypic.com/zkfko1.png[/IMG]

 

What could cause this?

 

I have posted my entire code

 

 

#include "stm32f4xx.h"
#include "stm32f4xx_tim.h"
#include "misc.h"
#include "system_stm32f4xx.h"
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_rcc.h"
#include <string.h>
#include "main.h"

uint8_t UH,UL,VH,VL,WH,WL,pdata;
uint16_t DutyCycle=0;

int main()
{

TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_ICInitTypeDef TIM_ICInitStructure ;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;

GPIO_InitTypeDef GPIO_InitStruct;
NVIC_InitTypeDef NVIC_InitStructure;


SystemInit();



RCC_ClocksTypeDef clocks;
RCC_GetClocksFreq(&clocks);
SysTick_Config(SystemCoreClock/1000);// Systick Handler is ticking at 1ms


RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD |RCC_AHB1Periph_GPIOC |RCC_AHB1Periph_GPIOB |RCC_AHB1Periph_GPIOE| RCC_AHB1Periph_GPIOA, ENABLE);//
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 , ENABLE); // 50 MHZ - Timer1 Clock enable


NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);


GPIO_InitStruct.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN ;
GPIO_Init(GPIOA, &GPIO_InitStruct);


GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 ;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN ;
GPIO_Init(GPIOA, &GPIO_InitStruct);



GPIO_InitStruct.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15 |GPIO_Pin_4;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN ;
GPIO_Init(GPIOB, &GPIO_InitStruct);

 

GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_TIM1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_TIM1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_TIM1);

 

GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_TIM1);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_TIM1);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_TIM1);






TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned2;
TIM_TimeBaseStructure.TIM_Period = 2000;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

 


TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;//
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0; // 10 %duty

TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Set;

TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OC3Init(TIM1, &TIM_OCInitStructure);

TIM_OCInitStructure.TIM_Pulse = 500; // 2 %duty
TIM_OC4Init(TIM1, &TIM_OCInitStructure);

 

TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);

 

TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;
TIM_BDTRInitStructure.TIM_DeadTime = 1;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable;
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);


TIM_CCPreloadControl(TIM1, DISABLE);

 

 

TIM_ITConfig(TIM1,TIM_IT_CC4 ,ENABLE); //Enable capture/compare interrupt on channel 4
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_OC4Ref);

 

TIM_Cmd(TIM1, ENABLE);

TIM_CtrlPWMOutputs(TIM1, ENABLE); 

DutyCycle=200;

 


while (1){

}
}

 

 

static const uint8_t FORWARD_TABLE[8][6] = // Motor step
{

//Hall value UH | UL | VH | VL | WH | WL
/* 0 */ { 0 , 0 , 0 , 0 , 0 , 0 }, // error 0 - this should not happen
/* 1 */ { 1 , 0 , 0 , 1 , 0 , 0 }, // motor step 6 from excel table !!!!
/* 2 */ { 0 , 0 , 1 , 0 , 0 , 1 }, // motor step 4 from excel table !!!!
/* 3 */ { 1 , 0 , 0 , 0 , 0 , 1 }, // motor step 5 from excel table !!!!
/* 4 */ { 0 , 1 , 0 , 0 , 1 , 0 }, // motor step 2 from excel table!!!!!
/* 5 */ { 0 , 0 , 0 , 1 , 1 , 0 }, // motor step 1 from excel table!!!!!
/* 6 */ { 0 , 1 , 1 , 0 , 0 , 0 }, // motor step 3 from excel table!!!!!
/* 7 */ { 0 , 0 , 0 , 0 , 0 , 0 }, // error 0 - this should not happen
};

 

 

void TIM1_CC_IRQHandler(void)
{
if (TIM_GetITStatus(TIM1, TIM_IT_CC4) != RESET) {
TIM_ClearITPendingBit(TIM1,TIM_IT_CC4);
TIM1->CCR1=DutyCycle;
TIM1->CCR2=DutyCycle;
TIM1->CCR3=DutyCycle;


pdata = (GPIO_ReadInputData(GPIOA)& 0x0007); // read current position of the rotor via the hall sensors

// Comutate acording Forward Table
UH = FORWARD_TABLE[pdata][0];
UL = FORWARD_TABLE[pdata][1];
VH = FORWARD_TABLE[pdata][2];
VL = FORWARD_TABLE[pdata][3];
WH = FORWARD_TABLE[pdata][4];
WL = FORWARD_TABLE[pdata][5];



//*********************** Check PHASE W Switching FETs ************************//
if(WH ==1)
{ // should Phase W FET high active?
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM1);
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
}
else
{ //No? Ok, should W Fet low active?
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Disable); // High side FET OFF


if(WL==1)
{ // Should W really really switch to Low?
// Low side FET: ON
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_ForcedAction_Active);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
}
else
{ // Ok so neither low or high for phase W
// Low side FET: OFF
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
}

}


//*************** Check PHASE U Switching FETs *************************//
if(UH ==1)
{ // should Phase U FET high active?
TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_PWM1);
TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
}
else
{ //No? Ok, should U Fet low active?

TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Disable); // High side FET OFF

if(UL==1)
{ // Should U really really switch to Low?
TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_ForcedAction_Active);
TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
}
else
{ // Ok so neither low or high for phase U
// Low side FET: OFF
TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
}

}



// ************** Check PHASE V Switching FETs ********************//
if(VH ==1)
{ // should Phase V FET high active?
TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_PWM1);
TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
}
else
{ //No? Ok, should V Fet low active?
TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Disable); // High side FET OFF

if(VL==1)
{ // Should V really really switch to Low?
// Low side FET: ON
TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_ForcedAction_Active);
TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);

}
else
{ // Ok so neither low or high for phase V
// Low side FET: OFF
TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
}

}

}
}

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