I've found an error in RM0367 revision 6 (STM32L0x3 Reference manual).
Please see attachment. As you can see, the VLCD rail numbering in Table 74 does not match the Figure 70.
CubeMX software (V4.23) also has a bug in Bias selector due to discrepancy in documentation.
In case of 1/3 BIAS CubeMX configures PB0 and PB12 pins as VLCD rails instead of PB2 and PB12.
In case of 1/2 BIAS CubeMX configures PB12 instead of PB2.