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Configuring GPIO threshold

Question asked by Moamen Ayman on Dec 24, 2017
Latest reply on Dec 25, 2017 by T J

Hi everybody!

 I am working on a design using STM32F407VGT6 runs at 168MHz, I want to enable an external line interrupt with rising signal edge. I am monitoring a signal from some system which when reachs 1.3V I should consider this as high voltage and execute its ISR. After some testing I see that when MCU input signal reach 1.5v and avove(up to 3v my VDD supply voltage) it considers it as high so is there any way I can decrease this minimum active high voltage to 1.3v so I can connect to the system directly without using comparator OP-AMP and once signal reach 1.3v, MCU considers it as rising edge and execute the ISR. Is it good to decrease the system VDD to 2.6v or it will affect something else like the clock I am working on.