I'm running a SPI Communication between 2 STM32F469IG Controllers. The Controllers have to be isolated which (for now) is done by a MAX14850 Digital Isolator.
I need to run the SPI Communication at Full 45 MHz. But with this a big Problem occurs.
This Isolator has a propagation delay of about 7-8ns. So when my MISO Data gets clocked into Master-CPU it already has a delay of 14-16ns compared to Masters SCK. At 45MHz (22ns Period) this is not working. So the Master is reading in MISO when MISO is still not valid.
So maybe someone had this Problem already and could help me. Or is there a general workaround for this?
Is it possible to configure the Master SPI to clock in the MISO Line one clock later? With this I mean if MOSI is clocked out with falling edge, then MISO should be clocked in with the next falling edge.
If this is not possible (what I think of) are there any cheap Digital Isolators which could handle that Speed regarding the propagation delay?
I attached some measurements. SCK1SCK2_2.png is the Masters Clock before and after the Isolator. The other picture is the MISO Line before and after Isolator.
Legend: yellow CPU1; green CPU2