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USART TC is set when initialising USART RCC

Question asked by Vidar (Z) on Dec 16, 2017
Latest reply on Dec 16, 2017 by Clive One

Hello. I am currently in a discussion at regarding the USART1 TC flag which become set as soon as the USART clock (RCC) is enabled.

c - STM32F407 USART1 : Clearing USART_FLAG_TC requires pgm to be halted before actually clearing the bit - Stack Overflo…


To repeat the problem short, the thing is that when RCC for USART1 is enabled, TXE and TC flag becomes set. It has been difficult to clear the TC flag thus when I send data and enables the TC interrupt I get the interrupt twice. Once because the flag is already set, and second when the actual data being sent is transmitted (i.e. transmission completed). When trying to clear the flag before enabling the interrupt by writing 0 to the SR register, the attempt to clear the flag is only working if stepping the code manually in the debugger.


However... If I enable the interrupt and clear the SR register in the IRQ handler the flag is cleared. After this the system works perfectly.


So there is two issues here.

1) In my opinion the TC flag should never have been set after initialisation of USART RCC before anything has been actually transmitted, A behaviour which the datasheet confirm that should have been the truth by : This bit is set by hardware if the transmission of a frame containing data is complete and if

TXE is set. TXE is indeed set, but there have not been completed any transmissions yet and thus TC should not have been set.


2) Clearing the flag should have work with code USART1->SR=0; also at runtime and not only when stepping the code.



Your opinions?