I'm required to integrate FatFs file system on my raw NAND flash memory. I'm interfacing the NAND through SPI peripheral of the STM32L486RG microcontroller. I have developed NAND a low level driver through which I can erase, write and read data in different locations of the memory.
Then, customized the diskio.c file (diskio_write , diskio_read , diskio_ioctl APIs ) which will be used by FatFs APIs.
I have succeeded to make a functional FAT16 file system through f_mkfs function and managing files (create, open, write, read and close) operations.
However, my actual throughput is still limited (especially when writing into files using f_write function). In fact, as the FatFs doesn't contain a wear levelling mechanism, I have developed my own mechanism which ensures a secure write operation, and consists on the following steps:
1- Erase and reserve a single block of the NAND Memory area;
2- Copy the required block data to the reserved block area;
3- Erase the required block area;
4- Write the new content into the required block area;
5- Copy back the old data to the required block area;
This mechanism is functional but not in line with required performances, since it’s time consuming (3mn to erase an area of 512Mo).
My question is:
1. Is it possible to handle the wear levelling mechanism to bypass this limitation in term of performance? If YES, does FatFs can support the integration of a Wear Levelling mechanism with no impact on functionalities.
2. Are there any known limitations on FatFs that may impact the performance of managing NAND memories with STM32?