(Please tell me if my thesis is wrong.)
If CMOS digital inputs are not driven to a voltage very close to the supply rails they can draw excess supply current - often called ∆Icc. The STM8S data sheets do not specify a value for ∆Icc; but, the STM8S Reference Manual implies that it can be an issue. In my application, I could reduce my power consumption if I could tri-state my PWM outputs and let them float. But the reference manual seems to say that this is not possible without increasing Icc. ST support was not able to help me with this; but, I refused to believe that a micro-controller would be designed with this weakness. So I started looking for a solution (Spoiler: I think that the reference manual may be either misleading or wrong).
The reference manual says this about unused inputs:
Unused I/O pins must not be left floating to avoid extra current consumption. They must be
put into one of the following configurations:
● connected to VDD or VSS by external pull-up or pull-down resistor and kept as input
floating (reset state),
● configured as input with internal pull-up/down resistor,
● configured as output push-pull low.
There are two unmentioned configurations that would obviously also work:
1. configured as output push-pull high.
2. configured as output open-drain low.
I propose that there is one more configuration that could work. (It's the one that I need for my application) :
3. configured as output open-drain HIGH.
This is my reasoning:
The reference manual says that the adc input pins can be allowed to float if the Schmitt trigger input is turned off using the ADC_TDR register - but only the adc input pins. Looking at the GPIO Block diagram there appears to two ways to turn off the Schmitt trigger input:
1. the ADC_TDR register
2. DDR register set to output
It is possible that this portion of the GPIO block diagram only applies to adc input pins; but, it makes sense that the input would be turned off whenever the pin is acting as an output. This is backed up by the fact that when the pin is configured as an output, reading the IDR register will not return the state of the pin.
The following table from the ref manual is the most explicit contradiction of my thesis; but, I think it is likely incorrect or incompletely qualified.
My conclusion: If the output is set to open-drain high, the pin would be high impedance and the input buffer would be turned off. Therefore, there should be no ∆Icc.
Eventually I will be in a position to test this on real hardware. I wish I had some reassurance that my analysis is correct.