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LED1642GW: Does it matter if the Latch (LE) signal is shifted within one word?

Question asked by Elias Zimmermann on Nov 13, 2017
Latest reply on Jan 12, 2018 by Clive One


according to the datasheet of the LED1642 driver, the LE signal value is defined by the number of CLK rising edges when the LE is 1.


In the datasheet, the figures always show LE signals which are aligned to the first rising clock edge of a new data signal (SDI) (like it is shown in the attached figure).


Is this a requirement we need to meet when implementing a driver? Is it valid, when the LE signal is high for a specified number of clock rising edges in the middle of a data signal block (16 bit)?


best regards