AnsweredAssumed Answered

When trying to debug, won't reflash memory

Question asked by pawlak.david on Nov 13, 2017
Latest reply on Nov 15, 2017 by pawlak.david

Everyting else seems to work fine. Reprograms memory using Utility just fine, but when I try to debug, it erases memory and hangs when it tries to reprogram the flash.

 

At one point, it did actually work, but sketchy and just for a little while. (hour or so)

 

Start with a log: Sorta long....

 

Open On-Chip Debugger 0.10.0-dev-00005-g4030e1c-dirty (2017-10-25-10:55)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
User : 13 4 command.c:546 command_print(): debug_level: 3
Debug: 14 4 options.c:98 add_default_dirs(): bindir=/src/staging/openocd/win32/bin
Debug: 15 5 options.c:99 add_default_dirs(): pkgdatadir=/src/staging/openocd/win32/share/openocd
Debug: 16 5 options.c:100 add_default_dirs(): run_prefix=C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.16.1.201710251246/tools/openocd/bin
Debug: 17 5 configuration.c:44 add_script_search_dir(): adding C:\Users\David Pawlak\AppData\Roaming/OpenOCD
Debug: 18 6 configuration.c:44 add_script_search_dir(): adding C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.16.1.201710251246/tools/openocd/bin/src/staging/openocd/win32/share/openocd/site
Debug: 19 7 configuration.c:44 add_script_search_dir(): adding C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.externaltools.openocd.win32_1.16.1.201710251246/tools/openocd/bin/src/staging/openocd/win32/share/openocd/scripts
Debug: 20 9 configuration.c:84 find_file(): found Sensor1 Debug.cfg
Debug: 21 14 configuration.c:84 find_file(): found C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.3.201710251246/resources/openocd/st_scripts/interface/stlink-tcp.cfg
Debug: 22 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 15 command.c:145 script_debug(): command - interface ocd_interface hla
Debug: 25 16 command.c:366 register_command_handler(): registering 'ocd_hla_device_desc'...
Debug: 26 16 command.c:366 register_command_handler(): registering 'ocd_hla_serial'...
Debug: 27 17 command.c:366 register_command_handler(): registering 'ocd_hla_layout'...
Debug: 28 17 command.c:366 register_command_handler(): registering 'ocd_hla_vid_pid'...
Debug: 29 17 command.c:366 register_command_handler(): registering 'ocd_hla_command'...
Debug: 30 18 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink-tcp
Debug: 31 18 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink-tcp
Debug: 33 18 hla_interface.c:241 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 19 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc stlink-tcp
Debug: 35 19 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc stlink-tcp
Debug: 37 19 hla_interface.c:215 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 20 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
Debug: 39 20 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
Debug: 40 20 hla_transport.c:193 hl_transport_select(): hl_transport_select
Debug: 41 21 command.c:366 register_command_handler(): registering 'ocd_hla'...
Debug: 42 21 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 43 21 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 44 21 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 45 22 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 46 22 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 47 23 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 48 23 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 49 23 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 23 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 51 24 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
Debug: 52 24 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate connect_assert_srst
Debug: 53 24 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate connect_assert_srst
User : 55 25 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_assert_srst
Debug: 56 25 configuration.c:84 find_file(): found C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.3.201710251246/resources/openocd/st_scripts/target/stm32f1x.cfg
Debug: 57 26 configuration.c:84 find_file(): found C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.3.201710251246/resources/openocd/st_scripts/target/swj-dp.tcl
Debug: 58 27 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 59 27 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 60 28 configuration.c:84 find_file(): found C:/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_2.1.3.201710251246/resources/openocd/st_scripts/mem_helper.tcl
Debug: 61 29 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
Debug: 62 29 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
Debug: 64 29 command.c:1100 help_add_command(): added 'mrw' help text
Debug: 65 29 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
Debug: 66 30 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
Debug: 68 31 command.c:1113 help_add_command(): added 'mrw' help text
Debug: 69 32 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
Debug: 70 32 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
Debug: 72 32 command.c:1100 help_add_command(): added 'mmw' help text
Debug: 73 33 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 74 33 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
Debug: 76 33 command.c:1113 help_add_command(): added 'mmw' help text
Debug: 77 34 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 78 34 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 79 34 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 80 35 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 81 35 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 82 35 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 83 35 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 84 36 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 85 36 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap STM32F103C8Tx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 86 37 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap STM32F103C8Tx cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x1ba01477
Debug: 87 37 hla_tcl.c:118 jim_hl_newtap_cmd(): Creating New Tap, Chip: STM32F103C8Tx, Tap: cpu, Dotted: STM32F103C8Tx.cpu, 8 params
Debug: 88 37 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irlen
Debug: 89 37 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -ircapture
Debug: 90 37 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irmask
Debug: 91 37 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 92 38 core.c:1306 jtag_tap_init(): Created Tap: STM32F103C8Tx.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 93 38 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 94 38 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 95 39 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create STM32F103C8Tx.cpu cortex_m -endian little -chain-position STM32F103C8Tx.cpu
Debug: 96 39 command.c:145 script_debug(): command - ocd_target ocd_target create STM32F103C8Tx.cpu cortex_m -endian little -chain-position STM32F103C8Tx.cpu
Info : 97 40 target.c:5223 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Debug: 98 40 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 99 40 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 100 41 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 101 41 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 102 41 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 103 41 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 104 42 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 105 42 command.c:366 register_command_handler(): registering 'ocd_tpiu'...
Debug: 106 42 command.c:366 register_command_handler(): registering 'ocd_itm'...
Debug: 107 42 command.c:366 register_command_handler(): registering 'ocd_itm'...
Debug: 108 43 hla_target.c:353 adapter_target_create(): adapter_target_create
Debug: 109 43 hla_target.c:324 adapter_init_arch_info(): adapter_init_arch_info
Debug: 110 43 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 111 43 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 112 44 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 113 44 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 114 44 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 115 44 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 116 45 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 117 45 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 118 45 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 119 46 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 120 46 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 121 46 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 122 47 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 123 47 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 124 47 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 125 47 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 126 48 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 127 48 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 128 48 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 129 48 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 130 49 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 131 49 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 132 49 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 133 50 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 134 50 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 135 50 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 136 51 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 137 51 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 138 51 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 139 51 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 140 52 command.c:366 register_command_handler(): registering 'ocd_STM32F103C8Tx.cpu'...
Debug: 141 52 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
Debug: 142 53 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
Debug: 143 53 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 144 53 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 145 53 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 146 54 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank STM32F103C8Tx.flash stm32f1x 0x08000000 0 0 0 STM32F103C8Tx.cpu
Debug: 147 54 command.c:145 script_debug(): command - ocd_flash ocd_flash bank STM32F103C8Tx.flash stm32f1x 0x08000000 0 0 0 STM32F103C8Tx.cpu
Debug: 149 55 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 150 55 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 151 55 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 152 55 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 153 56 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
Debug: 154 56 tcl.c:1031 handle_flash_bank_command(): 'stm32f1x' driver usage field missing
Debug: 155 56 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
Debug: 156 57 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
User : 158 57 command.c:546 command_print(): adapter_nsrst_delay: 100
Debug: 159 57 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 160 57 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 161 58 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 950
Debug: 162 58 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 950
Debug: 164 58 core.c:1633 jtag_config_khz(): handle jtag khz
Debug: 165 59 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 166 59 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
User : 167 59 command.c:546 command_print(): adapter speed: 950 kHz
Debug: 168 59 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 169 60 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 170 60 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event reset-start
if {[using_jtag]} {
adapter_khz 1125
} else {
adapter_khz 950
}

Debug: 171 61 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event reset-start
if {[using_jtag]} {
adapter_khz 1125
} else {
adapter_khz 950
}

Debug: 172 61 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event reset-init
global _CLOCK_FREQ

adapter_khz $_CLOCK_FREQ

Debug: 173 62 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event reset-init
global _CLOCK_FREQ

adapter_khz $_CLOCK_FREQ

Debug: 174 63 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event examine-end
global ENABLE_LOW_POWER
global STOP_WATCHDOG

if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
mmw 0xE0042004 0x00000300 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_CR |= ~(DBG_WWDG_STOP | DBG_IWDG_STOP)
mmw 0xE0042004 0 0x00000300
}

Debug: 175 66 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event examine-end
global ENABLE_LOW_POWER
global STOP_WATCHDOG

if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
mmw 0xE0042004 0x00000300 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_CR |= ~(DBG_WWDG_STOP | DBG_IWDG_STOP)
mmw 0xE0042004 0 0x00000300
}

Debug: 176 68 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event gdb-attach
global CONNECT_UNDER_RESET

# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
if { [expr ($CONNECT_UNDER_RESET == 1)] } {
reset init
}

Debug: 177 69 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event gdb-attach
global CONNECT_UNDER_RESET

# Needed to be able to use the connect_assert_srst in reset_config
# otherwise, wrong value when reading device flash size register
if { [expr ($CONNECT_UNDER_RESET == 1)] } {
reset init
}

Debug: 178 70 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0

Debug: 179 71 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event trace-config
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins
# assignment
mmw 0xE0042004 0x00000020 0

Debug: 180 72 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event gdb-detach
# to close connection if debug mode entered
shutdown

Debug: 181 73 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event gdb-detach
# to close connection if debug mode entered
shutdown

Debug: 182 73 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 183 74 command.c:145 script_debug(): command - init ocd_init
Debug: 185 74 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 186 74 command.c:145 script_debug(): command - ocd_target ocd_target init
Debug: 188 75 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 189 75 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 190 75 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu cget -event gdb-flash-erase-start
Debug: 191 76 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu cget -event gdb-flash-erase-start
Debug: 192 76 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event gdb-flash-erase-start reset init
Debug: 193 76 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event gdb-flash-erase-start reset init
Debug: 194 77 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu cget -event gdb-flash-write-end
Debug: 195 77 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu cget -event gdb-flash-write-end
Debug: 196 78 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu configure -event gdb-flash-write-end reset halt
Debug: 197 78 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu configure -event gdb-flash-write-end reset halt
Debug: 198 79 target.c:1308 handle_target_init_command(): Initializing targets...
Debug: 199 79 hla_target.c:343 adapter_init_target(): adapter_init_target
Debug: 200 79 command.c:366 register_command_handler(): registering 'ocd_target_request'...
Debug: 201 79 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 202 80 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 203 80 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 204 81 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
Debug: 205 81 command.c:366 register_command_handler(): registering 'ocd_profile'...
Debug: 206 81 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 207 81 command.c:366 register_command_handler(): registering 'ocd_reg'...
Debug: 208 82 command.c:366 register_command_handler(): registering 'ocd_poll'...
Debug: 209 82 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 210 82 command.c:366 register_command_handler(): registering 'ocd_halt'...
Debug: 211 82 command.c:366 register_command_handler(): registering 'ocd_resume'...
Debug: 212 83 command.c:366 register_command_handler(): registering 'ocd_reset'...
Debug: 213 83 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 214 83 command.c:366 register_command_handler(): registering 'ocd_step'...
Debug: 215 83 command.c:366 register_command_handler(): registering 'ocd_mdw'...
Debug: 216 84 command.c:366 register_command_handler(): registering 'ocd_mdh'...
Debug: 217 84 command.c:366 register_command_handler(): registering 'ocd_mdb'...
Debug: 218 84 command.c:366 register_command_handler(): registering 'ocd_mww'...
Debug: 219 84 command.c:366 register_command_handler(): registering 'ocd_mwh'...
Debug: 220 85 command.c:366 register_command_handler(): registering 'ocd_mwb'...
Debug: 221 85 command.c:366 register_command_handler(): registering 'ocd_bp'...
Debug: 222 85 command.c:366 register_command_handler(): registering 'ocd_rbp'...
Debug: 223 85 command.c:366 register_command_handler(): registering 'ocd_wp'...
Debug: 224 86 command.c:366 register_command_handler(): registering 'ocd_rwp'...
Debug: 225 86 command.c:366 register_command_handler(): registering 'ocd_load_image'...
Debug: 226 86 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
Debug: 227 86 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
Debug: 228 87 command.c:366 register_command_handler(): registering 'ocd_test_image'...
Debug: 229 87 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 230 87 command.c:366 register_command_handler(): registering 'ocd_ps'...
Debug: 231 88 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
Debug: 232 88 hla_interface.c:111 hl_interface_init(): hl_interface_init
Debug: 233 88 hla_layout.c:91 hl_layout_init(): hl_layout_init
Debug: 234 88 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 235 88 core.c:1603 adapter_khz_to_speed(): have interface set up
Debug: 236 89 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 237 89 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 238 89 core.c:1388 adapter_init(): clock speed 1800 kHz
Debug: 239 89 openocd.c:137 handle_init_command(): Debug Adapter init complete
Debug: 240 90 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 241 90 command.c:145 script_debug(): command - ocd_transport ocd_transport init
Debug: 243 90 transport.c:240 handle_transport_init(): handle_transport_init
Debug: 244 90 hla_transport.c:154 hl_transport_init(): hl_transport_init
Debug: 245 91 hla_transport.c:171 hl_transport_init(): current transport hla_swd
Debug: 246 91 hla_interface.c:44 hl_interface_open(): hl_interface_open
Debug: 247 91 hla_layout.c:42 hl_layout_open(): hl_layout_open
Debug: 248 92 stlink_tcp.c:707 stlink_tcp_open(): socket : a0
Debug: 249 92 stlink_tcp.c:738 stlink_tcp_open(): prepare to connect socket : a0
Debug: 250 93 stlink_tcp.c:742 stlink_tcp_open(): socket connected.
Debug: 251 94 stlink_tcp.c:747 stlink_tcp_open(): 1 card detected.
Debug: 252 94 stlink_tcp.c:751 stlink_tcp_open(): get-stlink-chosen 0xdb691440
Debug: 253 94 stlink_tcp.c:756 stlink_tcp_open(): registred card 1 db691440, key db691440
Debug: 254 95 stlink_tcp.c:771 stlink_tcp_open(): open-device : 0xdb691440
Debug: 255 97 stlink_tcp.c:776 stlink_tcp_open(): connect_id 1105
Debug: 256 98 stlink_tcp.c:782 stlink_tcp_open(): init mode with param->connect_under_reset 1
Debug: 257 98 stlink_tcp.c:305 stlink_tcp_init_mode(): init_mode : 1
Debug: 258 100 stlink_tcp.c:789 stlink_tcp_open(): stlink_tcp_get_version
Info : 259 101 stlink_tcp.c:633 stlink_tcp_get_version(): STLINK v2 JTAG v29 API v2 VID 0x0483 PID 0x3748
Info : 260 102 stlink_tcp.c:644 stlink_tcp_check_voltage(): Target voltage: 3.231196
Debug: 261 102 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 262 102 core.c:727 jtag_add_reset(): SRST line asserted
Debug: 263 102 core.c:755 jtag_add_reset(): TRST line released
Debug: 264 103 core.c:329 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 265 103 stlink_tcp.c:288 stlink_tcp_assert_srst(): assert_srst : 0
Debug: 266 103 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
Debug: 267 104 stlink_tcp.c:329 stlink_tcp_idcode(): IDCODE: 0x1BA01477
Debug: 268 104 openocd.c:150 handle_init_command(): Examining targets...
Debug: 269 104 target.c:1501 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 270 104 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 271 105 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 272 105 cortex_m.c:1933 cortex_m_examine(): Cortex-M3 r1p1 processor detected
Debug: 273 106 cortex_m.c:1941 cortex_m_examine(): cpuid: 0x411fc231
Debug: 274 106 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 275 106 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 276 107 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
Debug: 277 107 target.c:2226 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug: 278 107 target.c:2314 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 279 108 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
Debug: 280 108 target.c:2314 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 281 108 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
Debug: 282 109 target.c:2314 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 283 109 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
Debug: 284 110 target.c:2314 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 285 110 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
Debug: 286 111 target.c:2314 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 287 111 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1
Debug: 288 111 target.c:2314 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 289 111 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1
Debug: 290 112 target.c:2314 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 291 112 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1
Debug: 292 114 target.c:2314 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 293 114 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1
Debug: 294 115 cortex_m.c:2032 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2
Debug: 295 115 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
Debug: 296 116 target.c:2226 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 297 116 target.c:2314 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 298 116 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
Debug: 299 117 target.c:2314 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 300 117 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
Debug: 301 118 target.c:2314 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 302 118 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1
Debug: 303 119 target.c:2314 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 304 119 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1
Debug: 305 119 cortex_m.c:1847 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 306 120 cortex_m.c:2042 cortex_m_examine(): STM32F103C8Tx.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 307 120 target.c:1501 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 308 120 target.c:4256 target_handle_event(): target: (0) STM32F103C8Tx.cpu (hla_target) event: 22 (examine-end) action:
global ENABLE_LOW_POWER
global STOP_WATCHDOG

if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
mmw 0xE0042004 0x00000300 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_CR |= ~(DBG_WWDG_STOP | DBG_IWDG_STOP)
mmw 0xE0042004 0 0x00000300
}

Debug: 309 123 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 310 127 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 7
Debug: 311 128 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 7
Debug: 313 129 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 314 129 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 315 130 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 316 131 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 318 132 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 319 132 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 320 133 command.c:145 script_debug(): command - ocd_flash ocd_flash init
Debug: 322 133 tcl.c:1097 handle_flash_init_command(): Initializing flash devices...
Debug: 323 134 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 324 134 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 325 134 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 326 134 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 327 134 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 328 135 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 329 135 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 330 135 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 331 136 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 332 136 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 333 136 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 334 136 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 335 137 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 336 137 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 337 137 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 338 137 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 339 138 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 341 138 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
Debug: 342 139 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 343 139 command.c:145 script_debug(): command - ocd_nand ocd_nand init
Debug: 345 140 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 346 140 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 347 140 command.c:145 script_debug(): command - ocd_pld ocd_pld init
Debug: 349 141 pld.c:207 handle_pld_init_command(): Initializing PLDs...
Debug: 350 141 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset init
Debug: 351 142 command.c:145 script_debug(): command - reset ocd_reset init
Debug: 353 142 target.c:1519 target_call_reset_callbacks(): target reset 3 (init)
Debug: 354 143 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 355 143 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 356 145 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-start
Debug: 357 146 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-start
Debug: 358 151 target.c:4256 target_handle_event(): target: (0) STM32F103C8Tx.cpu (hla_target) event: 7 (reset-start) action:
if {[using_jtag]} {
adapter_khz 1125
} else {
adapter_khz 950
}

Debug: 359 151 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 360 154 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 361 154 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 950
Debug: 362 155 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 950
Debug: 364 155 core.c:1633 jtag_config_khz(): handle jtag khz
Debug: 365 155 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 366 156 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 367 156 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 950 kHz, using 950 kHz
Info : 368 157 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 950 kHz, using 950 kHz
Debug: 369 157 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 370 158 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 371 158 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 950 kHz, using 950 kHz
User : 372 158 command.c:546 command_print(): adapter speed: 950 kHz
Debug: 373 158 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 374 159 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 375 159 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 376 160 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 377 160 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event examine-start
Debug: 378 160 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event examine-start
Debug: 379 161 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu arp_examine
Debug: 380 161 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu arp_examine
Debug: 381 162 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event examine-end
Debug: 382 162 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event examine-end
Debug: 383 162 target.c:4256 target_handle_event(): target: (0) STM32F103C8Tx.cpu (hla_target) event: 22 (examine-end) action:
global ENABLE_LOW_POWER
global STOP_WATCHDOG

if { [expr ($ENABLE_LOW_POWER == 1)] } {
# Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0
}
if { [expr ($ENABLE_LOW_POWER == 0)] } {
# Disable debug during low power modes
# DBGMCU_CR |= ~(DBG_STANDBY | DBG_STOP | DBG_SLEEP)
mmw 0xE0042004 0 0x00000007
}
if { [expr ($STOP_WATCHDOG == 1)] } {
# Stop watchdog counters during halt
# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
mmw 0xE0042004 0x00000300 0
}
if { [expr ($STOP_WATCHDOG == 0)] } {
# Don't stop watchdog counters during halt
# DBGMCU_CR |= ~(DBG_WWDG_STOP | DBG_IWDG_STOP)
mmw 0xE0042004 0 0x00000300
}

Debug: 384 165 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 385 166 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 386 167 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 388 167 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 389 168 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042004 4 1
Debug: 390 169 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0xE0042004 775
Debug: 391 169 command.c:145 script_debug(): command - mww ocd_mww 0xE0042004 775
Debug: 393 169 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0042004 4 1
Debug: 394 170 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-assert-pre
Debug: 395 171 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-assert-pre
Debug: 396 171 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 397 172 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 398 172 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu arp_reset assert 1
Debug: 399 172 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu arp_reset assert 1
Debug: 400 173 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 401 173 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
Debug: 402 173 stlink_tcp.c:288 stlink_tcp_assert_srst(): assert_srst : 0
Debug: 403 182 stlink_tcp.c:465 stlink_tcp_reset(): stlink-usb-reset
Debug: 404 184 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-assert-post
Debug: 405 184 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-assert-post
Debug: 406 185 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-deassert-pre
Debug: 407 185 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-deassert-pre
Debug: 408 186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 409 186 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 410 186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu arp_reset deassert 1
Debug: 411 187 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu arp_reset deassert 1
Debug: 412 187 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
Debug: 413 187 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
Debug: 414 187 stlink_tcp.c:288 stlink_tcp_assert_srst(): assert_srst : 1
Debug: 415 188 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 416 189 core.c:731 jtag_add_reset(): SRST line released
Debug: 417 189 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-deassert-post
Debug: 418 189 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-deassert-post
Debug: 419 190 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 420 190 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 421 191 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu arp_waitstate halted 1000
Debug: 422 192 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu arp_waitstate halted 1000
Debug: 423 193 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 424 193 target.c:2226 target_read_u32(): address: 0xe000edf8, value: 0x01000000
Debug: 425 194 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 426 194 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0 value 0x1
Debug: 427 195 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 428 195 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1 value 0x40
Debug: 429 196 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 430 197 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2 value 0x1
Debug: 431 197 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 432 198 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3 value 0x525
Debug: 433 198 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 434 199 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4 value 0x1
Debug: 435 200 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 436 200 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5 value 0x0
Debug: 437 201 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 438 201 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6 value 0x0
Debug: 439 202 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 440 202 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 441 203 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 442 203 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8 value 0x0
Debug: 443 204 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 444 204 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9 value 0x0
Debug: 445 205 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 446 205 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10 value 0x0
Debug: 447 206 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 448 206 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11 value 0x0
Debug: 449 207 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 450 207 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12 value 0x0
Debug: 451 207 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 452 208 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13 value 0x20005000
Debug: 453 209 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 454 209 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14 value 0xffffffff
Debug: 455 210 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 456 210 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15 value 0x8000f4c
Debug: 457 211 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 458 211 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16 value 0x1000000
Debug: 459 212 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 460 212 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17 value 0x20005000
Debug: 461 212 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 462 213 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18 value 0x0
Debug: 463 213 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 464 215 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 465 216 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 466 217 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 467 217 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 468 218 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 469 218 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 470 219 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 471 219 hla_target.c:433 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x08000f4c, target->state: halted
Debug: 472 220 target.c:1501 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 473 220 target.c:1501 target_call_event_callbacks(): target event 1 (halted)
User : 474 220 target.c:1936 target_arch_state(): STM32F103C8Tx.cpu: target state: halted
User : 475 220 armv7m.c:553 armv7m_arch_state(): target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x08000f4c msp: 0x20005000
Debug: 476 221 hla_target.c:472 adapter_poll(): halted: PC: 0x08000f4c
Debug: 477 221 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu curstate
Debug: 478 221 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu curstate
Debug: 479 222 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
Debug: 480 222 command.c:145 script_debug(): command - ocd_transport ocd_transport select
Debug: 481 222 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu arp_waitstate halted 5000
Debug: 482 223 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu arp_waitstate halted 5000
Debug: 483 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-init
Debug: 484 224 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-init
Debug: 485 224 target.c:4256 target_handle_event(): target: (0) STM32F103C8Tx.cpu (hla_target) event: 17 (reset-init) action:
global _CLOCK_FREQ

adapter_khz $_CLOCK_FREQ

Debug: 486 225 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 4000
Debug: 487 225 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 4000
Debug: 489 225 core.c:1633 jtag_config_khz(): handle jtag khz
Debug: 490 225 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 491 225 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 492 226 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 4000 kHz, using 4000 kHz
Info : 493 226 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 4000 kHz, using 4000 kHz
Debug: 494 226 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 495 227 core.c:1603 adapter_khz_to_speed(): have interface set up
Info : 496 227 stlink_tcp.c:573 stlink_tcp_speed(): Unable to match requested speed 4000 kHz, using 4000 kHz
User : 497 227 command.c:546 command_print(): adapter speed: 4000 kHz
Debug: 498 228 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_STM32F103C8Tx.cpu invoke-event reset-end
Debug: 499 228 command.c:145 script_debug(): command - ocd_STM32F103C8Tx.cpu ocd_STM32F103C8Tx.cpu invoke-event reset-end
Debug: 500 229 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_echo ** Programming Started **
Debug: 501 229 command.c:145 script_debug(): command - echo ocd_echo ** Programming Started **
User : 503 229 command.c:764 jim_echo(): ** Programming Started **
Debug: 504 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash write_image erase Debug/Sensor1.elf
Debug: 505 230 command.c:145 script_debug(): command - ocd_flash ocd_flash write_image erase Debug/Sensor1.elf
User : 507 232 command.c:546 command_print(): auto erase enabled
Debug: 508 232 configuration.c:84 find_file(): found Debug/Sensor1.elf
Debug: 509 232 image.c:71 autodetect_image_type(): ELF image detected.
Debug: 510 233 configuration.c:84 find_file(): found Debug/Sensor1.elf
Debug: 511 233 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 512 233 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 513 234 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0042000 4 1
Debug: 514 234 target.c:2226 target_read_u32(): address: 0xe0042000, value: 0x20036410
Info : 515 234 stm32f1x.c:866 stm32x_probe(): device id = 0x20036410
Debug: 516 235 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 517 235 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x411fc231
Debug: 518 235 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x1ffff7e0 2 1
Debug: 519 236 stlink_tcp.c:262 stlink_tcp_read_string_mem(): read the next transfert(0) of 2 byte
Debug: 520 236 target.c:2250 target_read_u16(): address: 0x1ffff7e0, value: 0x0080
Info : 521 237 stm32f1x.c:1008 stm32x_probe(): flash size = 128kbytes
Debug: 522 237 core.c:712 flash_write_unlock(): image_read_section: section = 0, t_section_num = 0, section_offset = 0, buffer_size = 0, size_read = 4308
Debug: 523 237 image.c:480 image_elf_read_section(): load segment 0 at 0x0 (sz = 0x10d4)
Debug: 524 237 image.c:487 image_elf_read_section(): read elf: size = 0x4308 at 0x10000
Debug: 525 237 core.c:712 flash_write_unlock(): image_read_section: section = 1, t_section_num = 1, section_offset = 0, buffer_size = 4308, size_read = 1092
Debug: 526 238 image.c:480 image_elf_read_section(): load segment 1 at 0x0 (sz = 0x444)
Debug: 527 238 image.c:487 image_elf_read_section(): read elf: size = 0x1092 at 0x20000
Debug: 528 238 target.c:2314 target_write_u32(): address: 0x40022004, value: 0x45670123
Debug: 529 239 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022004 4 1
Debug: 530 239 target.c:2314 target_write_u32(): address: 0x40022004, value: 0xcdef89ab
Debug: 531 240 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022004 4 1
Debug: 532 240 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 533 240 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 534 241 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08000000
Debug: 535 241 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 536 242 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 537 242 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 538 243 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 539 243 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 540 244 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 541 246 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 542 246 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 543 246 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 544 249 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 545 249 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 546 249 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 547 252 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 548 252 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 549 252 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 550 254 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 551 254 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 552 254 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 553 257 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 554 257 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 555 258 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 556 260 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 557 260 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 558 261 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 559 263 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 560 263 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000003
Debug: 561 264 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x3
Debug: 562 266 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 563 266 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 564 266 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 565 267 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 566 267 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 567 268 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08000400
Debug: 568 269 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 569 269 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 570 269 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 571 270 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 572 271 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 573 271 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 574 273 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 575 273 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 576 273 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 577 276 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 578 276 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 579 276 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 580 279 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 581 279 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 582 279 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 583 282 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 584 282 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 585 282 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 586 285 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 587 285 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 588 285 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 589 288 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 590 288 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 591 288 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 592 291 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 593 291 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 594 291 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 595 293 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 596 293 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 597 293 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 598 293 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 599 294 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 600 294 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08000800
Debug: 601 295 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 602 295 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 603 296 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 604 296 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 605 297 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 606 297 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 607 299 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 608 299 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 609 299 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 610 302 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 611 302 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 612 302 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 613 304 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 614 304 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 615 304 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 616 307 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 617 307 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 618 307 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 619 310 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 620 310 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 621 311 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 622 313 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 623 313 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 624 313 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 625 315 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 626 315 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 627 316 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 628 318 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 629 318 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 630 318 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 631 321 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 632 321 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 633 321 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 634 322 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 635 322 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 636 322 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08000c00
Debug: 637 322 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 638 323 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 639 323 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 640 324 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 641 325 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 642 325 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 643 326 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 644 327 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 645 327 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 646 328 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 647 329 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 648 329 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 649 331 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 650 332 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 651 332 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 652 334 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 653 334 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 654 334 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 655 336 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 656 336 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 657 336 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 658 338 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 659 338 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 660 338 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 661 340 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 662 340 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 663 341 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 664 343 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 665 343 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 666 343 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 667 346 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 668 346 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 669 346 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 670 348 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 671 348 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 672 349 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 673 349 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 674 349 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 675 350 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08001000
Debug: 676 350 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 677 351 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 678 351 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 679 352 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 680 352 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 681 353 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 682 355 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 683 355 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 684 355 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 685 357 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 686 357 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 687 358 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 688 360 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 689 361 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 690 361 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 691 363 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 692 363 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 693 363 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 694 365 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 695 365 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 696 365 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 697 368 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 698 368 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 699 369 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 700 371 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 701 371 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 702 372 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 703 374 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 704 374 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 705 374 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 706 374 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000002
Debug: 707 375 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 708 375 target.c:2314 target_write_u32(): address: 0x40022014, value: 0x08001400
Debug: 709 375 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022014 4 1
Debug: 710 376 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000042
Debug: 711 376 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 712 377 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 713 378 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 714 378 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 715 380 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 716 380 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 717 380 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 718 383 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 719 383 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 720 383 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 721 386 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 722 386 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 723 386 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 724 389 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 725 389 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 726 389 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 727 391 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 728 391 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 729 391 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 730 393 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 731 393 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 732 393 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 733 395 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 734 395 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 735 396 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 736 398 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 737 398 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000023
Debug: 738 399 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x23
Debug: 739 401 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x4002200c 4 1
Debug: 740 401 target.c:2226 target_read_u32(): address: 0x4002200c, value: 0x00000020
Debug: 741 401 stm32f1x.c:177 stm32x_wait_status_busy(): status: 0x20
Debug: 742 401 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000080
Debug: 743 402 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 744 402 target.c:2314 target_write_u32(): address: 0x40022004, value: 0x45670123
Debug: 745 402 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022004 4 1
Debug: 746 403 target.c:2314 target_write_u32(): address: 0x40022004, value: 0xcdef89ab
Debug: 747 403 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022004 4 1
Debug: 748 404 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000001
Debug: 749 404 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Debug: 750 405 target.c:1708 target_alloc_working_area_try(): MMU disabled, using physical address for working memory 0x20000000
Debug: 751 405 target.c:1761 target_alloc_working_area_try(): allocated new working area of 60 bytes at address 0x20000000
Debug: 752 405 target.c:1624 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)
Debug: 753 406 target.c:1624 print_wa_layout(): 0x2000003c-0x20004fff (20420 bytes)
Debug: 754 406 target.c:2017 target_write_buffer(): writing buffer of 60 byte at 0x20000000
Debug: 755 406 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x20000000 4 15
Debug: 756 2410 target.c:1761 target_alloc_working_area_try(): allocated new working area of 16384 bytes at address 0x2000003c
Debug: 757 2410 target.c:1624 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)
Debug: 758 2411 target.c:1624 print_wa_layout(): * 0x2000003c-0x2000403b (16384 bytes)
Debug: 759 2411 target.c:1624 print_wa_layout(): 0x2000403c-0x20004fff (4036 bytes)
Debug: 760 2412 target.c:2314 target_write_u32(): address: 0x2000003c, value: 0x20000044
Debug: 761 2413 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x2000003c 4 1
Debug: 762 2414 target.c:2314 target_write_u32(): address: 0x20000040, value: 0x20000044
Debug: 763 2415 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x20000040 4 1
Debug: 764 2416 target.c:1501 target_call_event_callbacks(): target event 3 (resume-start)
Debug: 765 2417 hla_target.c:600 adapter_resume(): adapter_resume 0 0x20000000 1 1
Debug: 766 2417 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 767 2418 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
Debug: 768 2426 armv7m.c:146 armv7m_restore_context():
Debug: 769 2427 armv7m.c:278 armv7m_write_core_reg(): write core reg 15 value 0x20000000
Debug: 770 2427 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 771 2428 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 772 2429 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 15 value 0x20000000
Debug: 773 2430 armv7m.c:278 armv7m_write_core_reg(): write core reg 4 value 0x8000000
Debug: 774 2431 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 775 2431 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 776 2433 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 4 value 0x8000000
Debug: 777 2434 armv7m.c:278 armv7m_write_core_reg(): write core reg 3 value 0x2000403c
Debug: 778 2434 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 779 2435 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 780 2436 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 3 value 0x2000403c
Debug: 781 2437 armv7m.c:278 armv7m_write_core_reg(): write core reg 2 value 0x2000003c
Debug: 782 2437 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 783 2438 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 784 2439 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 2 value 0x2000003c
Debug: 785 2441 armv7m.c:278 armv7m_write_core_reg(): write core reg 1 value 0xc00
Debug: 786 2441 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 787 2442 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 788 2443 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 1 value 0xc00
Debug: 789 2444 armv7m.c:278 armv7m_write_core_reg(): write core reg 0 value 0x40022000
Debug: 790 2445 hla_target.c:150 adapter_store_core_reg_u32(): adapter_store_core_reg_u32
Debug: 791 2445 stlink_tcp.c:513 stlink_tcp_write_reg(): stlink_tcp_write_reg
Debug: 792 2447 hla_target.c:168 adapter_store_core_reg_u32(): write core reg 0 value 0x40022000
Debug: 793 2447 target.c:2314 target_write_u32(): address: 0xe000edf8, value: 0x01000000
Debug: 794 2448 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edf8 4 1
Debug: 795 2450 target.c:1501 target_call_event_callbacks(): target event 20 (debug-resumed)
Debug: 796 2451 target.c:1501 target_call_event_callbacks(): target event 4 (resume-end)
Debug: 797 2451 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x20000040 4 1
Debug: 798 2452 target.c:2226 target_read_u32(): address: 0x20000040, value: 0x20000044
Debug: 799 2453 target.c:936 target_run_flash_async_algorithm(): offs 0x0 count 0xc00 wp 0x20000044 rp 0x20000044
Debug: 800 2453 target.c:2017 target_write_buffer(): writing buffer of 6144 byte at 0x20000044
Debug: 801 2453 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x20000044 4 1536
Debug: 802 4459 target.c:2314 target_write_u32(): address: 0x2000003c, value: 0x20001844
Debug: 803 4460 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x2000003c 4 1
Debug: 804 4463 target.c:2788 target_wait_state(): waiting for target halted...
Debug: 805 4964 log.c:422 keep_alive(): keep_alive() was not invoked in the 1000ms timelimit (4964). This may cause trouble with GDB connections.
Error: 825 14464 target.c:2796 target_wait_state(): timed out while waiting for target halted
Debug: 826 14464 hla_target.c:568 adapter_halt(): adapter_halt
Debug: 827 14464 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 828 14465 target.c:2226 target_read_u32(): address: 0xe000edf8, value: 0x01000000
Debug: 829 14465 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 830 14466 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0 value 0x0
Debug: 831 14466 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 832 14466 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1 value 0xc00
Debug: 833 14467 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 834 14467 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2 value 0x20000000
Debug: 835 14467 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 836 14468 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3 value 0x2000403c
Debug: 837 14468 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 838 14469 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4 value 0x0
Debug: 839 14469 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 840 14469 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5 value 0x20000044
Debug: 841 14470 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 842 14470 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6 value 0x0
Debug: 843 14471 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 844 14471 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7 value 0x0
Debug: 845 14471 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 846 14472 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8 value 0x0
Debug: 847 14472 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 848 14473 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9 value 0x0
Debug: 849 14473 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 850 14474 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10 value 0x0
Debug: 851 14474 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 852 14474 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11 value 0x0
Debug: 853 14475 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 854 14475 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12 value 0x0
Debug: 855 14475 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 856 14476 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13 value 0x20004fe0
Debug: 857 14476 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 858 14477 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14 value 0xfffffff9
Debug: 859 14477 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 860 14477 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15 value 0xfffffffe
Debug: 861 14478 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 862 14478 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16 value 0x41000003
Debug: 863 14479 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 864 14479 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17 value 0x20004fe0
Debug: 865 14480 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 866 14480 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18 value 0x0
Debug: 867 14480 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 868 14481 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 869 14481 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 870 14482 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 871 14482 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 872 14483 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 873 14483 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 874 14484 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 875 14485 hla_target.c:433 adapter_debug_entry(): entered debug state in core mode: Handler at PC 0xfffffffe, target->state: halted
Debug: 876 14485 target.c:1501 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 877 14485 target.c:1501 target_call_event_callbacks(): target event 1 (halted)
User : 878 14485 target.c:1936 target_arch_state(): STM32F103C8Tx.cpu: target state: halted
User : 879 14486 armv7m.c:553 armv7m_arch_state(): target halted due to debug-request, current mode: Handler HardFault
xPSR: 0x41000003 pc: 0xfffffffe msp: 0x20004fe0
Debug: 880 14486 hla_target.c:472 adapter_poll(): halted: PC: 0xfffffffe
Error: 881 14486 target.c:1013 target_run_flash_async_algorithm(): error waiting for target flash write algorithm
Debug: 882 14486 target.c:1830 target_free_working_area_restore(): freed 16384 bytes of working area at address 0x2000003c
Debug: 883 14487 target.c:1624 print_wa_layout(): * 0x20000000-0x2000003b (60 bytes)
Debug: 884 14487 target.c:1624 print_wa_layout(): 0x2000003c-0x20004fff (20420 bytes)
Debug: 885 14487 target.c:1830 target_free_working_area_restore(): freed 60 bytes of working area at address 0x20000000
Debug: 886 14488 target.c:1624 print_wa_layout(): 0x20000000-0x20004fff (20480 bytes)
Debug: 887 14488 target.c:2314 target_write_u32(): address: 0x40022010, value: 0x00000080
Debug: 888 14488 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40022010 4 1
Error: 889 14489 core.c:93 flash_driver_write(): error writing to flash at address 0x08000000 at offset 0x00000000
Debug: 890 14489 command.c:628 run_command(): Command failed with error code -302
Debug: 891 14489 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_echo ** Programming Failed **
Debug: 892 14490 command.c:145 script_debug(): command - echo ocd_echo ** Programming Failed **
User : 895 14490 command.c:764 jim_echo(): ** Programming Failed **
Debug: 896 14491 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_shutdown error
Debug: 897 14491 command.c:145 script_debug(): command - shutdown ocd_shutdown error
User : 899 14492 server.c:652 handle_shutdown_command(): shutdown command invoked
Debug: 900 14492 command.c:628 run_command(): Command failed with error code -4
User : 901 14492 command.c:689 command_run_line():
Debug: 902 14492 hla_interface.c:119 hl_interface_quit(): hl_interface_quit
Debug: 903 14493 stlink_tcp.c:144 stlink_tcp_close(): close stlink socket : h = 451

Outcomes