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FMC clock limitation described on DS12117

Question asked by Boram Youn on Nov 10, 2017


While I was reading DS12117(which is the data sheet of STM32H753xI), I discovered something is different with STM32F7 description.


On the description of memory feature, they say 

Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND Flash clocked up to 133 MHz in synchronous mode 


I know that the clock limitation was not included in STM32F7, and CubeMX seems to allow the user to set the FMC clock up to 200MHz. 

Can anyone let me know what does "clocked up to 133MHz" means in this context? Is it related with new feature of H7 series? How should I configure the clock settings in real application? 


Thank you for your replies in advance.