I am working with a DAC that requires the CS signal to be asserted/release on every command which it is 24 bits. Using normal SPI HAL functionality there is a idle/dead time between clocks for each byte being transferred.
So I tried HAL SPI DMA transaction which burst the 24 bits but it takes more time to get to the interrupt as you can see on the attached snapshot. The blue channel is my CS which goes low before calling the HAL DMA SPI transmit function and goes high during the DMA interrupt (transfer complete).
Wondering if there is a way to shrink/speed up the HAL DMA SPI TX functionality.
Due I need to control the CS line every 24 bits (3 bytes) I cant do the burst for all the data I want to transfer.