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STM8L051F3 - PA0 changes its state from 0 to 1 after HALT

Question asked by Georgi Manchev on Nov 7, 2017

Hello, I'm working on project with STM8L051F3 and detect strange behavior of PA0 when entering in active HALT mode.
Sometimes after execution of HALT at the output of PA0 there is "1" although it is programmed in "0".
in the errata sheet I do not find a description of such a problem, and I do not find a logical explanation for such behavior.


- disable SWD
    # CFG->GCR |= CFG_GCR_SWD;

- disable interrupts

- configure PA0 as output LOW
  # GPIOA->CR2 &= ~GPIO_Pin_0;
  # GPIOA->ODR &= ~GPIO_Pin_0;

- enable interrupts



Any idea about the reason of this issue?

Thanks in advance!