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stm32f072 can not remap memory: SYSCFG CFGR1 has no effect

Question asked by Florian Delizy on Nov 1, 2017
Latest reply on Nov 3, 2017 by Florian Delizy



I am trying to write a generic bootloader for STM32F072, I read countless reports on this forum (and other on the Internet), that basically states the following procedure:


  1. disable interrupts
  2. Install the partition ISR (first 48 words) into SRAM base (0x2000000)
  3. use SYSCFG CFGR1 to remap 0x0 to point to SRAM base (0x20000000)
  4. read the 2nd word of the ISR and jump to it (application will have to re-enable interrupts


So that is basically what I am doing, but after checking using a debug probe (JLink), it seems that even if I remap the 0x0 to point to SRAM, in fact, the setting has no effect. Here is the content of a quick debug session (using gdb):

gdb$ x /1xw 0x40010000
0x40010000:     0x00000003
gdb$ x /48xw 0x0
0x0:     0x20004000     0x08000e29     0x08000509     0x0800050b
0x10:     0x00000000     0x00000000     0x00000000     0x00000000
0x20:     0x00000000     0x00000000     0x00000000     0x08000e75
0x30:     0x00000000     0x00000000     0x08000e75     0x0800050f
0x40:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0x50:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0x60:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0x70:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0x80:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0x90:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0xa0:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
0xb0:     0x08000e75     0x08000e75     0x08000e75     0x08000e75
gdb$ x /48xw 0x20000000
0x20000000:     0x20004000     0x08018d29     0x0800c251     0x0800c25b
0x20000010:     0x00000000     0x00000000     0x00000000     0x00000000
0x20000020:     0x00000000     0x00000000     0x00000000     0x080020c1
0x20000030:     0x00000000     0x00000000     0x08002137     0x08002143
0x20000040:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x20000050:     0x08018d75     0x080031f5     0x080031d5     0x080031a9
0x20000060:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x20000070:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x20000080:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x20000090:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x200000a0:     0x08018d75     0x08018d75     0x08018d75     0x08018d75
0x200000b0:     0x08018d75     0x08018d75     0x55aa55aa     0x55aa55aa

So basically as you can see in this copy/paste the SYSCFG CFGR1 two LSB bits are 1 (so 0x0 should point to SRAM), but the content of 0x0 and 0x20000000 addresses are different ?? How could that be?


Here is the relevant part of the code that set the CFGR1 bits:


    *sramISR = *isr; // copy isr to sram ISR (0x20000000)


    // Breakpoint right here to check in gdb.


What am I doing wrong? any insight would be greatly appreciated.