I'm confused by the an4031 application note on the DMA. It states that only one DMA stream can be active at a point but later on it goes on to say that :
Dual AHB-to-APB port:
The AHB-to-APB bridge is a dual-port architecture that allows access through two different paths:
• A direct path (not crossing the bus matrix) that can be generated from DMA1 to APB1 or from DMA2 to APB2; in this case, access is not penalized by the bus matrix arbiter.
• A common path (through the bus matrix) that can be generated either from the CPU or from DMA2, which needs the bus matrix arbitration to win the bus.
Does this mean that the DMA2 can do two transfers simultaneously as long as one goes via the bus and the other via the direct path? There seems to be a lot said about the Dual dma port such as:
"Dual DMA port STM32F2/F4/F7 devices embed two DMAs. Each DMA has two ports, a memory port and a peripheral port, which can operate simultaneously not only at DMA level but also with other system masters, using the external bus matrix and dedicated DMA paths. The simultaneous operation allows to optimize DMA efficiency and to reduce response time (wait time between request and data transfer)."
I'm not really sure if I'm understanding this correctly..Does this mean DMA2 can do 2 requests simultaneously? like a read from peripheral to mem and a write from memory periph as long as its to two different buses? so AHB1 to/from APB1 and AHB1 to/from APB2 (as shown here :
Thanks in advance for any help!