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Question to developers of stm8 core about interruption behavior

Question asked by Vyacheslav Azarov on Oct 18, 2017
Latest reply on Jan 14, 2018 by Vyacheslav Azarov


I'm trying to develop for STM8 one simple but correct program. But I can not find an answer to one important question. Please explain the behavior of the interrupt system in the following situation. In the errata sheet (DocID17140 Rev 5, Section 2.1.3), a workaround for the abnormal behavior of the interrupt system was suggested. However, this requires that at least one interrupt handler instruction be guaranteed executed. Otherwise, the process of nested interrupt will start, which can lead to program crash. I would also like to clarify what is meant by the phrase " interrupt is cleared or masked when the context saving has already started"? Means this the interruption of the interrupt request logic signal and the arrival of a new request with a different interrupt  level, or something else?  I ask you to explain, in the same way, the behavior of the interrupt system, due to the impact of a flurry of events, that is, at simultaneously sending interrupt signals to the controller, with different priorities and levels. And one more question.  Why, in the errata sheet (DocID17922 Rev 7 Section 1.1.1) for STM8Lxxx, this situation have not a workaround.  Does this mean that interrupts cannot be reliable used ?

I will be very grateful for the informative answer.



Errata sheet for STM8Sxxx

Errata sheet for STM8Lxxx