Thank you for your response. So far this solves the issue.
I will highjack this thread to ask additional questions.
I do not know if this is also connected with 1.9.0 or it is a known issue (same PLLSAI1 clk config, but with additional peripherals, on 1.6.0 works). I am using custom board with STM32L476 on it.
Generated project (without changing anything in it) successfully builds, but it fails in file
"stm32l4xx_hal_rcc_ex.c" line 2948 (using 1.9.0 package)
(((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai1->PLLSAI1M)
(it eventually evaluates to "+1 !=1").
I admit i did not research this further, but it is the first time i generated project with CubeMX and peripheral timing asserts failed on such configuration.
And a general question. What is the state of STM provided eMMC (with possible FatFs) peripheral code for L4 family of cards? Will it be provided at anytime, or will it always generate placeholders in code?