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stm32f429 TIM10_input_capture mode question

Question asked by Kang Sung Gu on Oct 10, 2017
Latest reply on Oct 11, 2017 by waclawek.jan

setting CC1IE:1 (TIM10->DIER)

capture is good, but not occur capture interrupt

why?

 

this is my sorce code

 

  volatile uint32_t temp2 =0;
  /*******GPIOG_Ouput_Init****************/
  //RCC
  RCC->AHB1ENR |= 0x00000001<<6;     //GPIOG CLK EN
  //GPIOG
  GPIOG->MODER  |= 0x00000001<<(2*14);//01:output mode (PORT14)
  GPIOG->PUPDR  |= 0x00000000;       //00:no-pull_up, no-pull_down
  GPIOG->OTYPER |= 0x00000000;       //0:PUSH-PULL
  GPIOG->OSPEEDR|= 0x00000000;       //00:Low Speed
 
  /*******TIM10_InputCapture Init*********/
  //NVIC
  NVIC->ISPR[0] |= 0x00000001<<25; //TIM10 position 25
  //RCC
  RCC->AHB1ENR  |= 0x00000001<<5;  //GPIOF CLK EN
  temp2 = 0;
  RCC->APB2ENR  |= 0x00000001<<17; //TIM10 CLK EN
  //GPIOF AF
  GPIOF->MODER  |= 0x00000002<<(2*6); //PF6 10: AF MODE
  GPIOF->OTYPER |= 0x00000000;        //0:PUSH-PULL
  GPIOF->OSPEEDR|= 0x00000000;        //00:Low Speed
  GPIOF->PUPDR  |= 0x00000000;        //:no PU, no PD
  GPIOF->AFR[0] |= 0x00000003<<(4*6); //0011:AF3(TIM10)
  //TIM10
  TIM10->CCMR1  |= 0x00000001; //CC1S: 01(configured as Input)
  TIM10->CCMR1  |= 0x00000008; //IC1PSC: 10(capture is done once every 4 events)
  TIM10->CCER   |= 0x0000000A; //CC1P: 1, CC1NP: 1 (11: both edges)
  TIM10->CCER   |= 0x00000001; //CC1E: 1(Capture EN)
  TIM10->DIER   |= 0x00000002; //CC1IE:1(CC1 interrupt EN)
  TIM10->PSC    = 15999;       //Prescaler 16MHz/(15999 + 1) = 1clk = 1ms
  TIM10->ARR    = 9999;        // 1ms * (9999+1), overflow is 10 sec
  TIM10->CR1    |= 0x00000001; //CEN:  1(counter EN)
  temp2 = 1;
  /* USER CODE END 2 */

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/* USER CODE BEGIN 4 */
void TIM1_UP_TIM10_IRQHandler(void)
{
  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
  HAL_GPIO_TogglePin(GPIOG,GPIO_PIN_14);
  /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
  //HAL_TIM_IRQHandler(&htim10);
  TIM10->SR &= 0xFFFFFFFD; //CC1F : 0 reset
  /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */

  /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
}
/* USER CODE END 4 */

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