I'm working on an USB Device driver and I want to receive multiple isochronous packets per micro-frame (on high-speed of course).
As it is nowehere mentioned in errata, I asume it should be working, however there is no example of this working either.
Anyways, does anyone have proof that multiple isochronous transfers for IN and OUT endpoints work on F2/F4/F7 or H7?
What I see for OUT endpoint is that if I start transfer with for example (should be armed to receive 3 transfers of 256 bytes each, expectedly in same micro-frame):
OTG_DOEPTSIZ1 = (3 << 19 ) | (3*256);
set correct ODD or EVEN bit for next frame
OTG_DOEPCTL1 |= EPENA | CNAK;
I get only 1 RXFLVL and received size is 256, so I do not get 2 other transfers in same micro-frame.
Does anyone know what is the right procedure if this can work at all?
Does that require DMA?