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I2S "R Division Factor"???

Question asked by Terence D on Sep 25, 2017
Latest reply on Sep 28, 2017 by waclawek.jan

Hi - I'm trying to configure my STM32F429 Discovery board to send digital audio data to a Digilent PmodI2S DAC.  Section 28.4.4 (pg 911) of the STM32F429 reference manual says:

To achieve high-quality audio performance, the I2SxCLK clock source can be either the PLLI2S output (through R division factor) or an external clock (mapped to I2S_CKIN pin).


I can't find any other mention (let alone an explanation) of what this "R division factor" is.  Does anyone know what this means?