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PIT Timer Interrupt < 2.5us

Question asked by raghu tumati on Sep 20, 2017
Latest reply on Sep 26, 2017 by Erwan Y

Hi 

I trying to use the PIT to generate an interrupt every 1.7uS to toggle a GPIO and it does not seem to be working well. 

 

I have a sysclk of 64MHz. Im using PIT1 and setting the LDVAL register with a count. Now the timer seems to be working well for a count of 200000 which corresponds to an intrerupt time of 5uS. 

But any value less than that and the timer is unstable (high value of jitter) 

Going further a value of 1000000 which corresponds to an interrupt time of 1us just does not work. The PIT does not seem to be able to generate an interrupt less than 2.5us. 

I tried chaining the priority of the PIT interrupt to 15 in the file pit_lld.h 

 

Below is my setting 

 

#define SPC5_PIT_CH1_IRQ_PRIORITY       INTC_PSR_ENABLE(INTC_PSR_CORE0_15) 

 

This also did not seem to work. Is there any other setting that I can change to get this to work?

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